From: Timothy M. Jones <tjones1@inf.ed.ac.uk>
Date: Sat, 20 Feb 2010 20:11:58 +0000 (+0000)
Subject: BaseDynInst: Preserve the faults returned from read and write.
X-Git-Tag: stable_2012_02_02~1507
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a5feaa6a69c28f2ab12e28d47fd4bd62359b07c7;p=gem5.git

BaseDynInst: Preserve the faults returned from read and write.

When implementing timing address translations instead of atomic, I
forgot to preserve the faults that are returned from the read and
write calls.  This patch reinstates them.
---

diff --git a/src/cpu/base_dyn_inst.hh b/src/cpu/base_dyn_inst.hh
index 65578379b..a9ba12958 100644
--- a/src/cpu/base_dyn_inst.hh
+++ b/src/cpu/base_dyn_inst.hh
@@ -887,7 +887,7 @@ BaseDynInst<Impl>::read(Addr addr, T &data, unsigned flags)
     if (fault == NoFault) {
         effAddr = req->getVaddr();
         effAddrValid = true;
-        cpu->read(req, sreqLow, sreqHigh, data, lqIdx);
+        fault = cpu->read(req, sreqLow, sreqHigh, data, lqIdx);
     } else {
 
         // Return a fixed value to keep simulation deterministic even
@@ -933,7 +933,7 @@ BaseDynInst<Impl>::write(T data, Addr addr, unsigned flags, uint64_t *res)
     if (fault == NoFault) {
         effAddr = req->getVaddr();
         effAddrValid = true;
-        cpu->write(req, sreqLow, sreqHigh, data, sqIdx);
+        fault = cpu->write(req, sreqLow, sreqHigh, data, sqIdx);
     }
 
     return fault;