From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Tue, 17 Oct 2023 15:29:30 +0000 (+0100)
Subject: whitespace line
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a6238282b74b54119ab6de126c82e309273768f1;p=openpower-isa.git

whitespace line
---

diff --git a/openpower/isa/pifixedload.mdwn b/openpower/isa/pifixedload.mdwn
index a1fe93c1..0418b1cd 100644
--- a/openpower/isa/pifixedload.mdwn
+++ b/openpower/isa/pifixedload.mdwn
@@ -231,7 +231,8 @@ Pseudo-code:
 Description:
 
     Let the effective address (EA) be the register RA.
-    The word in storage addressed by EA is loaded into RT[32:63].RT[0:31] are filled with a copy of bit 0 of the loaded word.
+    The word in storage addressed by EA is loaded into RT[32:63].
+    RT[0:31] are filled with a copy of bit 0 of the loaded word.
 
     The sum (RA) + (RB) is placed into register RA.