From: Florent Kermarrec Date: Tue, 20 Aug 2013 14:53:55 +0000 (+0200) Subject: wishbone2lasmi : add support for 32 bits lasmim data width X-Git-Tag: 24jan2021_ls180~2099^2~472 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a653a6144b0c4154a3a7064b3a648b0500daa0ca;p=litex.git wishbone2lasmi : add support for 32 bits lasmim data width --- diff --git a/migen/bus/wishbone2lasmi.py b/migen/bus/wishbone2lasmi.py index 4c7881cd..75fd9fd7 100644 --- a/migen/bus/wishbone2lasmi.py +++ b/migen/bus/wishbone2lasmi.py @@ -11,8 +11,8 @@ class WB2LASMI(Module): ### - if lasmim.dw <= 32: - raise ValueError("LASMI data width must be strictly larger than 32") + if lasmim.dw < 32: + raise ValueError("LASMI data width must be >= 32") if (lasmim.dw % 32) != 0: raise ValueError("LASMI data width must be a multiple of 32") @@ -31,7 +31,12 @@ class WB2LASMI(Module): write_from_lasmi = Signal() write_to_lasmi = Signal() - adr_offset_r = Signal(offsetbits) + if adr_offset is None: + adr_offset_r = None + else: + adr_offset_r = Signal(offsetbits) + self.sync += adr_offset_r.eq(adr_offset) + self.comb += [ data_port.adr.eq(adr_line), If(write_from_lasmi, @@ -49,7 +54,7 @@ class WB2LASMI(Module): ), chooser(data_port.dat_r, adr_offset_r, self.wishbone.dat_r, reverse=True) ] - self.sync += adr_offset_r.eq(adr_offset) + # Tag memory tag_layout = [("tag", tagbits), ("dirty", 1)]