From: Jiong Wang Date: Wed, 8 Jun 2016 10:16:07 +0000 (+0000) Subject: [AArch64, 5/6] Reimplement fabd intrinsics & merge rtl patterns X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a672fa1247e54171542e1692bcd3cd6b2f41df2a;p=gcc.git [AArch64, 5/6] Reimplement fabd intrinsics & merge rtl patterns * config/aarch64/aarch64-builtins.def (fabd): New builtins for modes VALLF. * config/aarch64/aarch64-simd.md (fabd_3): Extend modes from VDQF to VALLF. Rename to "fabd3". "*fabd_scalar3): Delete. * config/aarch64/arm_neon.h (vabds_f32): Remove inline assembly. Use builtin. (vabdd_f64): Likewise. (vabd_f32): Likewise. (vabd_f64): Likewise. (vabdq_f32): Likewise. (vabdq_f64): Likewise. From-SVN: r237204 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 01894815098..5a3f57fe727 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,18 @@ +2016-06-08 Jiong Wang + + * config/aarch64/aarch64-builtins.def (fabd): New builtins for modes + VALLF. + * config/aarch64/aarch64-simd.md (fabd_3): Extend modes from VDQF + to VALLF. Rename to "fabd3". + "*fabd_scalar3): Delete. + * config/aarch64/arm_neon.h (vabds_f32): Remove inline assembly. + Use builtin. + (vabdd_f64): Likewise. + (vabd_f32): Likewise. + (vabd_f64): Likewise. + (vabdq_f32): Likewise. + (vabdq_f64): Likewise. + 2016-06-08 Jiong Wang * config/aarch64/aarch64-builtins.def (rsqrts): New builtins for modes diff --git a/gcc/config/aarch64/aarch64-simd-builtins.def b/gcc/config/aarch64/aarch64-simd-builtins.def index e839a59434b..342b98b1dc6 100644 --- a/gcc/config/aarch64/aarch64-simd-builtins.def +++ b/gcc/config/aarch64/aarch64-simd-builtins.def @@ -457,3 +457,6 @@ /* Implemented by aarch64_rsqrts. */ BUILTIN_VALLF (BINOP, rsqrts, 0) + + /* Implemented by fabd3. */ + BUILTIN_VALLF (BINOP, fabd, 3) diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md index 117cde98120..32f58f40e37 100644 --- a/gcc/config/aarch64/aarch64-simd.md +++ b/gcc/config/aarch64/aarch64-simd.md @@ -474,23 +474,14 @@ [(set_attr "type" "neon_arith_acc")] ) -(define_insn "fabd_3" - [(set (match_operand:VDQF 0 "register_operand" "=w") - (abs:VDQF (minus:VDQF - (match_operand:VDQF 1 "register_operand" "w") - (match_operand:VDQF 2 "register_operand" "w"))))] - "TARGET_SIMD" - "fabd\t%0., %1., %2." - [(set_attr "type" "neon_fp_abd_")] -) - -(define_insn "*fabd_scalar3" - [(set (match_operand:GPF 0 "register_operand" "=w") - (abs:GPF (minus:GPF - (match_operand:GPF 1 "register_operand" "w") - (match_operand:GPF 2 "register_operand" "w"))))] +(define_insn "fabd3" + [(set (match_operand:VALLF 0 "register_operand" "=w") + (abs:VALLF + (minus:VALLF + (match_operand:VALLF 1 "register_operand" "w") + (match_operand:VALLF 2 "register_operand" "w"))))] "TARGET_SIMD" - "fabd\t%0, %1, %2" + "fabd\t%0, %1, %2" [(set_attr "type" "neon_fp_abd_")] ) diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h index 72db325534e..f3011167d6d 100644 --- a/gcc/config/aarch64/arm_neon.h +++ b/gcc/config/aarch64/arm_neon.h @@ -5440,17 +5440,6 @@ vabaq_u32 (uint32x4_t a, uint32x4_t b, uint32x4_t c) return result; } -__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) -vabd_f32 (float32x2_t a, float32x2_t b) -{ - float32x2_t result; - __asm__ ("fabd %0.2s, %1.2s, %2.2s" - : "=w"(result) - : "w"(a), "w"(b) - : /* No clobbers */); - return result; -} - __extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) vabd_s8 (int8x8_t a, int8x8_t b) { @@ -5517,17 +5506,6 @@ vabd_u32 (uint32x2_t a, uint32x2_t b) return result; } -__extension__ static __inline float64_t __attribute__ ((__always_inline__)) -vabdd_f64 (float64_t a, float64_t b) -{ - float64_t result; - __asm__ ("fabd %d0, %d1, %d2" - : "=w"(result) - : "w"(a), "w"(b) - : /* No clobbers */); - return result; -} - __extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) vabdl_high_s8 (int8x16_t a, int8x16_t b) { @@ -5660,28 +5638,6 @@ vabdl_u32 (uint32x2_t a, uint32x2_t b) return result; } -__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) -vabdq_f32 (float32x4_t a, float32x4_t b) -{ - float32x4_t result; - __asm__ ("fabd %0.4s, %1.4s, %2.4s" - : "=w"(result) - : "w"(a), "w"(b) - : /* No clobbers */); - return result; -} - -__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) -vabdq_f64 (float64x2_t a, float64x2_t b) -{ - float64x2_t result; - __asm__ ("fabd %0.2d, %1.2d, %2.2d" - : "=w"(result) - : "w"(a), "w"(b) - : /* No clobbers */); - return result; -} - __extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) vabdq_s8 (int8x16_t a, int8x16_t b) { @@ -5748,17 +5704,6 @@ vabdq_u32 (uint32x4_t a, uint32x4_t b) return result; } -__extension__ static __inline float32_t __attribute__ ((__always_inline__)) -vabds_f32 (float32_t a, float32_t b) -{ - float32_t result; - __asm__ ("fabd %s0, %s1, %s2" - : "=w"(result) - : "w"(a), "w"(b) - : /* No clobbers */); - return result; -} - __extension__ static __inline int16_t __attribute__ ((__always_inline__)) vaddlv_s8 (int8x8_t a) { @@ -10235,6 +10180,45 @@ vtbx2_p8 (poly8x8_t r, poly8x8x2_t tab, uint8x8_t idx) /* Start of optimal implementations in approved order. */ +/* vabd. */ + +__extension__ static __inline float32_t __attribute__ ((__always_inline__)) +vabds_f32 (float32_t __a, float32_t __b) +{ + return __builtin_aarch64_fabdsf (__a, __b); +} + +__extension__ static __inline float64_t __attribute__ ((__always_inline__)) +vabdd_f64 (float64_t __a, float64_t __b) +{ + return __builtin_aarch64_fabddf (__a, __b); +} + +__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) +vabd_f32 (float32x2_t __a, float32x2_t __b) +{ + return __builtin_aarch64_fabdv2sf (__a, __b); +} + +__extension__ static __inline float64x1_t __attribute__ ((__always_inline__)) +vabd_f64 (float64x1_t __a, float64x1_t __b) +{ + return (float64x1_t) {vabdd_f64 (vget_lane_f64 (__a, 0), + vget_lane_f64 (__b, 0))}; +} + +__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) +vabdq_f32 (float32x4_t __a, float32x4_t __b) +{ + return __builtin_aarch64_fabdv4sf (__a, __b); +} + +__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) +vabdq_f64 (float64x2_t __a, float64x2_t __b) +{ + return __builtin_aarch64_fabdv2df (__a, __b); +} + /* vabs */ __extension__ static __inline float32x2_t __attribute__ ((__always_inline__))