From: Neil Roberts Date: Wed, 9 Sep 2015 16:44:17 +0000 (+0100) Subject: i965/fs/skl+: Fix calculating gl_SampleID for 16x MSAA X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a6804654283a9d03bee92d61eee5b1d036c8db68;p=mesa.git i965/fs/skl+: Fix calculating gl_SampleID for 16x MSAA In order to accomodate 16x MSAA, the starting sample pair index is now 3 bits rather than 2 on SKL+. Reviewed-by: Ben Widawsky Reviewed-by: Anuj Phogat --- diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index f5294195656..cb2536263dd 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp @@ -1313,9 +1313,15 @@ fs_visitor::emit_sampleid_setup() * are sample 1 of subspan 0; the third group is sample 0 of * subspan 1, and finally sample 1 of subspan 1. */ + + /* SKL+ has an extra bit for the Starting Sample Pair Index to + * accomodate 16x MSAA. + */ + unsigned sspi_mask = devinfo->gen >= 9 ? 0x1c0 : 0xc0; + abld.exec_all().group(1, 0) .AND(t1, fs_reg(retype(brw_vec1_grf(0, 0), BRW_REGISTER_TYPE_D)), - fs_reg(0xc0)); + fs_reg(sspi_mask)); abld.exec_all().group(1, 0).SHR(t1, t1, fs_reg(5)); /* This works for both SIMD8 and SIMD16 */