From: lkcl Date: Sat, 29 Apr 2023 15:39:29 +0000 (+0100) Subject: (no commit message) X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a69a2853ce50fbfc136bb926c9165bbc1c3b1029;p=libreriscv.git --- diff --git a/openpower/sv/rfc/ls016.mdwn b/openpower/sv/rfc/ls016.mdwn index 1daf67662..0b858f25c 100644 --- a/openpower/sv/rfc/ls016.mdwn +++ b/openpower/sv/rfc/ls016.mdwn @@ -66,7 +66,9 @@ The number of uses for FFT is also equally known to be extremely high ARM has already added `vqrdmulhq_s16/32` instructions as their inclusion in any ISA replaces **eight** non-Twin-Butterfly instructions, which -are often loop-unrolled, resulting in L1 I-Cache stripmining. +are often loop-unrolled, resulting in L1 I-Cache stripmining as well +as requiring far greater resources or much more complex hardware to +get efficient execution. **Notes and Observations**: