From: Maciej W. Rozycki Date: Thu, 21 Aug 2014 11:57:00 +0000 (+0100) Subject: MIPS/opcodes: Remove microMIPS 48-bit LI instruction X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a6c7053929dd26d04293429e8610209f5b1bf900;p=binutils-gdb.git MIPS/opcodes: Remove microMIPS 48-bit LI instruction The 48-bit LI instruction encoding has been removed from the microMIPS ISA and no implementation ever made that included it. * micromips-opc.c (micromips_opcodes): Remove #ifdef-ed out 48-bit "li" encoding. --- diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 82ec520ccab..dfea7d366b4 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2014-08-21 Maciej W. Rozycki + + * micromips-opc.c (micromips_opcodes): Remove #ifdef-ed out + 48-bit "li" encoding. + 2014-08-19 Andreas Arnez * s390-dis.c (s390_insn_length, s390_insn_matches_opcode) diff --git a/opcodes/micromips-opc.c b/opcodes/micromips-opc.c index 7571c6bd945..4bf8241a035 100644 --- a/opcodes/micromips-opc.c +++ b/opcodes/micromips-opc.c @@ -296,10 +296,6 @@ const struct mips_opcode micromips_opcodes[] = {"li", "md,mI", 0xec00, 0xfc00, WR_1, 0, I1, 0, 0 }, {"li", "t,j", 0x30000000, 0xfc1f0000, WR_1, INSN2_ALIAS, I1, 0, 0 }, /* addiu */ {"li", "t,i", 0x50000000, 0xfc1f0000, WR_1, INSN2_ALIAS, I1, 0, 0 }, /* ori */ -#if 0 -/* Disabled until we can handle 48-bit opcodes. */ -{"li", "s,I", 0x7c0000010000, 0xfc00001f0000, WR_t, 0, I3, 0, 0 }, /* li48 */ -#endif {"li", "t,I", 0, (int) M_LI, INSN_MACRO, 0, I1, 0, 0 }, {"move", "d,s", 0, (int) M_MOVE, INSN_MACRO, 0, I1, 0, 0 }, {"move", "mp,mj", 0x0c00, 0xfc00, WR_1|RD_2, 0, I1, 0, 0 },