From: Dmitry Selyutin Date: Sun, 28 May 2023 22:04:57 +0000 (+0300) Subject: ppc: support maddedus instruction X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a73201add47c6acb2eecbf4210c097f0937543c4;p=binutils-gdb.git ppc: support maddedus instruction --- diff --git a/gas/testsuite/gas/ppc/maddedus.d b/gas/testsuite/gas/ppc/maddedus.d new file mode 100644 index 00000000000..994abfd4762 --- /dev/null +++ b/gas/testsuite/gas/ppc/maddedus.d @@ -0,0 +1,12 @@ +#as: -mlibresoc +#objdump: -dr -Mlibresoc + +.*: file format .* + + +Disassembly of section \.text: +0+ <\.text>: +.*:\s+(13 e0 00 39|39 00 e0 13)\s+maddedus\s+r31,r0,r0,r0 +.*:\s+(10 1f 00 39|39 00 1f 10)\s+maddedus\s+r0,r31,r0,r0 +.*:\s+(10 00 f8 39|39 f8 00 10)\s+maddedus\s+r0,r0,r31,r0 +.*:\s+(10 00 07 f9|f9 07 00 10)\s+maddedus\s+r0,r0,r0,r31 diff --git a/gas/testsuite/gas/ppc/maddedus.s b/gas/testsuite/gas/ppc/maddedus.s new file mode 100644 index 00000000000..79a19f4a6ad --- /dev/null +++ b/gas/testsuite/gas/ppc/maddedus.s @@ -0,0 +1,4 @@ +maddedus 31,0,0,0 +maddedus 0,31,0,0 +maddedus 0,0,31,0 +maddedus 0,0,0,31 diff --git a/gas/testsuite/gas/ppc/ppc.exp b/gas/testsuite/gas/ppc/ppc.exp index cc4c755df1e..549e1415872 100644 --- a/gas/testsuite/gas/ppc/ppc.exp +++ b/gas/testsuite/gas/ppc/ppc.exp @@ -173,3 +173,4 @@ run_dump_test "divmod2du" run_dump_test "sadd" run_dump_test "dsld" run_dump_test "dsrd" +run_dump_test "maddedus" diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c index 96037806129..a88e483866f 100644 --- a/opcodes/ppc-opc.c +++ b/opcodes/ppc-opc.c @@ -5261,6 +5261,7 @@ const struct powerpc_opcode powerpc_opcodes[] = { {"ps_mul.", A (4, 25,1), AFRB_MASK, PPCPS, 0, {FRT, FRA, FRC}}, {"maddedu", VXA(4, 50), VXA_MASK, SFFS, PPCVLE, {RT, RA, RB, RC}}, {"maddld", VXA(4, 51), VXA_MASK, POWER9, 0, {RT, RA, RB, RC}}, +{"maddedus", VXA(4, 57), VXA_MASK, SFFS, PPCVLE, {RT, RA, RB, RC}}, {"divmod2du", VXA(4, 58), VXA_MASK, SFFS, 0, {RT, RA, RB, RC}}, {"ps_rsqrte", A (4, 26,0), AFRAFRC_MASK, PPCPS, 0, {FRT, FRB}}, {"ps_rsqrte.", A (4, 26,1), AFRAFRC_MASK, PPCPS, 0, {FRT, FRB}},