From: whitequark Date: Tue, 18 Dec 2018 15:06:02 +0000 (+0000) Subject: hdl.ast, hdl.xfrm: various microoptimizations to speed up pysim. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a7389541f332e652260b95494994aabf5a622bff;p=nmigen.git hdl.ast, hdl.xfrm: various microoptimizations to speed up pysim. --- diff --git a/nmigen/hdl/ast.py b/nmigen/hdl/ast.py index 0eb8275..b9a7d7a 100644 --- a/nmigen/hdl/ast.py +++ b/nmigen/hdl/ast.py @@ -980,7 +980,7 @@ class ValueKey: if isinstance(self.value, Const): return hash(self.value.value) elif isinstance(self.value, Signal): - return hash(id(self.value)) + return hash(self.value.duid) elif isinstance(self.value, Operator): return hash((self.value.op, tuple(ValueKey(o) for o in self.value.operands))) elif isinstance(self.value, Slice): @@ -998,15 +998,15 @@ class ValueKey: .format(self.value)) def __eq__(self, other): - if not isinstance(other, ValueKey): + if type(other) is not ValueKey: return False - if type(self.value) != type(other.value): + if type(self.value) is not type(other.value): return False if isinstance(self.value, Const): return self.value.value == other.value.value elif isinstance(self.value, Signal): - return id(self.value) == id(other.value) + return self.value is other.value elif isinstance(self.value, Operator): return (self.value.op == other.value.op and len(self.value.operands) == len(other.value.operands) and @@ -1066,7 +1066,7 @@ class ValueSet(_MappedKeySet): class SignalKey: def __init__(self, signal): - if not isinstance(signal, Signal): + if type(signal) is not Signal: raise TypeError("Object '{!r}' is not an nMigen signal") self.signal = signal @@ -1074,10 +1074,12 @@ class SignalKey: return hash(self.signal.duid) def __eq__(self, other): - return isinstance(other, SignalKey) and self.signal.duid == other.signal.duid + if type(other) is not SignalKey: + return False + return self.signal is other.signal def __lt__(self, other): - if not isinstance(other, SignalKey): + if type(other) is not SignalKey: raise TypeError("Object '{!r}' cannot be compared to a SignalKey") return self.signal.duid < other.signal.duid diff --git a/nmigen/hdl/xfrm.py b/nmigen/hdl/xfrm.py index 36b0c98..a87a524 100644 --- a/nmigen/hdl/xfrm.py +++ b/nmigen/hdl/xfrm.py @@ -60,25 +60,25 @@ class AbstractValueTransformer(metaclass=ABCMeta): raise TypeError("Cannot transform value '{!r}'".format(value)) # :nocov: def on_value(self, value): - if isinstance(value, Const): + if type(value) is Const: new_value = self.on_Const(value) - elif isinstance(value, Signal): + elif type(value) is Signal: new_value = self.on_Signal(value) - elif isinstance(value, ClockSignal): + elif type(value) is ClockSignal: new_value = self.on_ClockSignal(value) - elif isinstance(value, ResetSignal): + elif type(value) is ResetSignal: new_value = self.on_ResetSignal(value) - elif isinstance(value, Operator): + elif type(value) is Operator: new_value = self.on_Operator(value) - elif isinstance(value, Slice): + elif type(value) is Slice: new_value = self.on_Slice(value) - elif isinstance(value, Part): + elif type(value) is Part: new_value = self.on_Part(value) - elif isinstance(value, Cat): + elif type(value) is Cat: new_value = self.on_Cat(value) - elif isinstance(value, Repl): + elif type(value) is Repl: new_value = self.on_Repl(value) - elif isinstance(value, ArrayProxy): + elif type(value) is ArrayProxy: new_value = self.on_ArrayProxy(value) else: new_value = self.on_unknown_value(value) @@ -140,9 +140,10 @@ class AbstractStatementTransformer(metaclass=ABCMeta): raise TypeError("Cannot transform statement '{!r}'".format(stmt)) # :nocov: def on_statement(self, stmt): - if isinstance(stmt, Assign): + if type(stmt) is Assign: return self.on_Assign(stmt) elif isinstance(stmt, Switch): + # Uses `isinstance()` and not `type() is` because nmigen.compat requires it. return self.on_Switch(stmt) elif isinstance(stmt, Iterable): return self.on_statements(stmt)