From: whitequark Date: Wed, 12 Aug 2020 20:02:18 +0000 (+0000) Subject: Merge pull request #2340 from andy-knowles/cxxrtl-fix-alu-carryout X-Git-Tag: working-ls180~329 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a74a43d85d5dd078d3cf7f1a0ab725dc90e3e456;p=yosys.git Merge pull request #2340 from andy-knowles/cxxrtl-fix-alu-carryout cxxrtl.h: Fix incorrect CarryOut in alu when Bits % 32 != 0 && Invert == False --- a74a43d85d5dd078d3cf7f1a0ab725dc90e3e456