From: Nick Clifton Date: Wed, 19 May 1999 07:25:59 +0000 (+0000) Subject: Renumber cpu flag bits to avoid collision with PE flag bits X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a74ffb029e42cab61745e28e9af2a6c658ccd2eb;p=binutils-gdb.git Renumber cpu flag bits to avoid collision with PE flag bits --- diff --git a/include/coff/ChangeLog b/include/coff/ChangeLog index 783a017e474..b6c35ab313e 100644 --- a/include/coff/ChangeLog +++ b/include/coff/ChangeLog @@ -1,3 +1,9 @@ +Mon May 17 13:35:35 1999 Stan Cox + + * coff/arm.h (F_PIC, F_ARM_2, F_ARM_2a, F_ARM_3, F_ARM_3M, + F_ARM_4, F_ARM_4T, F_APCS26): Changed values to distinguish + F_ARM_2a, F_ARM_3M, F_ARM_4T. + 1999-05-15 Nick Clifton * mcore.h (IMAGE_REL_MCORE_RVA): Define. diff --git a/include/coff/arm.h b/include/coff/arm.h index dd578b1a76a..e5d78d69367 100644 --- a/include/coff/arm.h +++ b/include/coff/arm.h @@ -44,16 +44,17 @@ struct external_filehdr { /* Bits stored in flags field of the internal_f structure */ #define F_INTERWORK (0x0010) -#define F_PIC_INT (0x0020) #define F_APCS_FLOAT (0x0040) -#define F_ARM_ARCHITECTURE_MASK (0x0c00) -#define F_ARM_2 (0x0000) -#define F_ARM_2a (0x0000) -#define F_ARM_3 (0x0400) -#define F_ARM_3M (0x0400) -#define F_ARM_4 (0x0800) -#define F_ARM_4T (0x0c00) -#define F_APCS26 (0x4000) +#define F_PIC (0x0080) +#define F_APCS26 (0x1000) +#define F_ARM_ARCHITECTURE_MASK (0x4000+0x0800+0x0400) +#define F_ARM_2 (0x0400) +#define F_ARM_2a (0x0800) +#define F_ARM_3 (0x0c00) +#define F_ARM_3M (0x4000) +#define F_ARM_4 (0x4400) +#define F_ARM_4T (0x4800) +#define F_ARM_spare (0x4c00) /* * ARMMAGIC ought to encoded the procesor type,