From: Florent Kermarrec Date: Sun, 16 Sep 2012 09:51:03 +0000 (+0200) Subject: update README X-Git-Tag: 24jan2021_ls180~2575^2~136 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a7658cdc6cc256b7189035997305ff7a531fc528;p=litex.git update README --- diff --git a/README b/README index c0dd61b7..140818d8 100644 --- a/README +++ b/README @@ -14,14 +14,12 @@ Simulation: -tb_MigScope : Global Test with Csr : [Ok] Example Design: --de0_nano : Generate Signals in FPGA and probe them with migScope : [Wip] +-de0_nano : Generate Signals in FPGA and probe them with migScope : [Ok] Toolchain [Ok] --de1 : Generate Signals in FPGA and probe them with migScope : [Wip] +-de1 : Generate Signals in FPGA and probe them with migScope : [Ok] Toolchain [Ok] - test_MigIo : Led & Switch Test controlled by Python [Ok] - - test_MigLa : Logic Analyzer controlled by Python [Wip] - (Still some glitches in received Data, let's use - migScope to debug itself :)) + - test_MigLa : Logic Analyzer controlled by Python [Ok] [> Contact E-mail: florent@enjoy-digital.fr