From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Thu, 14 Mar 2019 05:49:21 +0000 (+0000)
Subject: whitespace cleanup
X-Git-Tag: div_pipeline~2291
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a7701acbb1b133dd4e377b6dd6096d763d174eb2;p=soc.git

whitespace cleanup
---

diff --git a/TLB/test/test_permission_validator.py b/TLB/test/test_permission_validator.py
index 6b4d7573..0b6e96f6 100644
--- a/TLB/test/test_permission_validator.py
+++ b/TLB/test/test_permission_validator.py
@@ -35,7 +35,7 @@ def testbench(dut):
     xwr = 0
     valid = 1
     yield from set_validator(dut, data, xwr, super_mode, super_access, asid)
-    yield from check_valid(dut, valid, 0) 
+    yield from check_valid(dut, valid, 0)
 
     # Test user mode entry valid
     # Global Bit nonmatching ASID
@@ -55,14 +55,14 @@ def testbench(dut):
     # Ensure that user mode and valid is enabled!
     data = 0x7FFF0000000000000021
     # Ignore MSB it will be truncated
-    asid = 0x7FF6  
+    asid = 0x7FF6
     super_mode = 0
     super_access = 0
     xwr = 0
     valid = 0
     yield from set_validator(dut, data, xwr, super_mode, super_access, asid)
-    yield from check_valid(dut, valid, 0)     
-    
+    yield from check_valid(dut, valid, 0)
+
     # Test user mode entry valid
     # Ensure that user mode and valid is enabled!
     data = 0x7FFF0000000000000011