From: Neel <neelgala@gmail.com>
Date: Fri, 3 Aug 2018 04:46:28 +0000 (+0530)
Subject: providing default values of the mux to be compile time defined
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a7c04b8f08bc5c0bfb4241efb273a0b9deb01141;p=shakti-peripherals.git

providing default values of the mux to be compile time defined
---

diff --git a/src/peripherals/mux/mux.bsv b/src/peripherals/mux/mux.bsv
index d7ff5f6..39c48fa 100644
--- a/src/peripherals/mux/mux.bsv
+++ b/src/peripherals/mux/mux.bsv
@@ -35,11 +35,13 @@ package mux;
 	endinterface
 
 //	(*synthesize*)
-	module mkmux(MUX#(ionum_));
-	  Vector#(ionum_,ConfigReg#(Bit#(2))) muxer_reg 				<-replicateM(mkConfigReg(0));
+	module mkmux#(Bit#(TMul#(ionum_, 2)) defvalue)(MUX#(ionum_));
+    let ionum=valueOf(ionum_);
+	  Vector#(ionum_,ConfigReg#(Bit#(2))) muxer_reg 				
+    for(Integer i=0;i<ionum;i=i+ 1)
+      muxer_reg[i]<-mkConfigReg(defvalue[i*2+ 1:i*2]);
 		
 		AXI4_Lite_Slave_Xactor_IFC #(`PADDR, `DATA, `USERSPACE)  s_xactor <- mkAXI4_Lite_Slave_Xactor;
-    let ionum=valueOf(ionum_);
 		rule rl_wr_respond;
 			// Get the wr request
             //aw is write address, w is write data