From: Eddie Hung <eddie@fpgeh.com>
Date: Tue, 10 Sep 2019 03:56:29 +0000 (-0700)
Subject: Set USE_MULT and USE_SIMD
X-Git-Tag: working-ls180~1039^2~163
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a7e60322878913886278d537365baf939182a1d9;p=yosys.git

Set USE_MULT and USE_SIMD
---

diff --git a/techlibs/xilinx/dsp_map.v b/techlibs/xilinx/dsp_map.v
index fdd55afe3..cc37f0085 100644
--- a/techlibs/xilinx/dsp_map.v
+++ b/techlibs/xilinx/dsp_map.v
@@ -23,7 +23,9 @@ module \$__MUL25X18 (input [24:0] A, input [17:0] B, output [42:0] Y);
 		.INMODEREG(0),
 		.MREG(0),
 		.OPMODEREG(0),
-		.PREG(0)
+		.PREG(0),
+		.USE_MULT("MULTIPLY"),
+		.USE_SIMD("ONE48")
 	) _TECHMAP_REPLACE_ (
 		//Data path
 		.A({{5{A[24]}}, A}),