From: Sebastien Bourdeauducq <sb@m-labs.hk>
Date: Mon, 19 Oct 2015 08:08:42 +0000 (+0800)
Subject: Revert "sim/core: fix Cat bitshift"
X-Git-Tag: 24jan2021_ls180~2099^2~3^2~17
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a824046bbc81c11092f0eaa8b9aef76783296467;p=litex.git

Revert "sim/core: fix Cat bitshift"

This reverts commit 6d6f91a02b6ff4b5459fe91fcae5b97ce915f7dd.
---

diff --git a/migen/sim/core.py b/migen/sim/core.py
index 157d63ff..af3f3734 100644
--- a/migen/sim/core.py
+++ b/migen/sim/core.py
@@ -156,11 +156,10 @@ class Evaluator:
                 value -= 2**node.nbits
             self.modifications[node] = value
         elif isinstance(node, Cat):
-            nbits = 0
             for element in node.l:
-                value >>= nbits
                 nbits = len(element)
                 self.assign(element, value & (2**nbits-1))
+                value >>= nbits
         elif isinstance(node, _Slice):
             full_value = self.eval(node.value, True)
             # clear bits assigned to by the slice