From: Florent Kermarrec Date: Fri, 6 Dec 2019 15:15:08 +0000 (+0100) Subject: targets/versa_ecp5: fix compilation with diamond X-Git-Tag: 24jan2021_ls180~819 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a8635c48a4be2ccc0ae2aeaaa4653ee13f5302c1;p=litex.git targets/versa_ecp5: fix compilation with diamond --- diff --git a/litex/boards/targets/versa_ecp5.py b/litex/boards/targets/versa_ecp5.py index 81ad572b..ceee2f44 100755 --- a/litex/boards/targets/versa_ecp5.py +++ b/litex/boards/targets/versa_ecp5.py @@ -139,7 +139,10 @@ def main(): cls = EthernetSoC if args.with_ethernet else BaseSoC soc = cls(toolchain=args.toolchain, sys_clk_freq=int(float(args.sys_clk_freq)), **soc_sdram_argdict(args)) builder = Builder(soc, **builder_argdict(args)) - builder.build(**trellis_argdict(args)) + builder_kargs = {} + if args.toolchain == "trellis": + builder_kargs == trellis_argdict(args) + builder.build(**builder_kargs) if __name__ == "__main__": main()