From: lkcl <lkcl@web>
Date: Sat, 13 May 2023 23:48:05 +0000 (+0100)
Subject: (no commit message)
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a877e404090d6b6713924b31e243a81b2a1e8b63;p=libreriscv.git

---

diff --git a/openpower/sv/cr_ops.mdwn b/openpower/sv/cr_ops.mdwn
index 509034282..62c609ef9 100644
--- a/openpower/sv/cr_ops.mdwn
+++ b/openpower/sv/cr_ops.mdwn
@@ -44,7 +44,7 @@ considered to be a "co-result". Such CR Field "co-result" arithmeric
 operations are firmly out of scope for this section, being covered fully
 by [[sv/normal]].
 
-* Examples of v3.0B instructions to which this section does
+* Examples of Vectoriseable Defined Words to which this section does
   apply is
   - `mfcr` and `cmpi` (3 bit operands) and
   - `crnor` and `crand` (5 bit operands).
@@ -66,10 +66,9 @@ Other modes are still applicable and include:
   Reduction is useful for analysing a Vector of Condition Register Fields
   and reducing it to one single Condition Register Field.
 
-Predicate-result does not make any sense because when Rc=1 a co-result
-is created (a CR Field). Testing the co-result allows the decision to
-be made to store or not store the main result, and for CR Ops the CR
-Field result *is* the main result.
+Special atrention should be paid on the difference between Data-Dependent Fail-First
+on CR operations and [[openpower/sv/normal]] regarding the seemingly-contradictory
+behaviour of `Rc=1,VLi=0`. Explained below.
 
 ## Format