From: lkcl <lkcl@web>
Date: Sat, 7 May 2022 16:00:41 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~2319
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a8a393c4653918330ae43f2f8b0a21f26046352d;p=libreriscv.git

---

diff --git a/openpower/sv/SimpleV_rationale.mdwn b/openpower/sv/SimpleV_rationale.mdwn
index edbf7b6c1..b6ee4150d 100644
--- a/openpower/sv/SimpleV_rationale.mdwn
+++ b/openpower/sv/SimpleV_rationale.mdwn
@@ -239,7 +239,7 @@ instruction.
 
 *Packed SIMD looped algorithms actually have to
 contain multiple implementations processing fragments of data at
-different SIMD widths: Cray-style Vectors have one, covering not
+different SIMD widths: Cray-style Vectors have just the one, covering not
 just current architectural implementations but future ones with
 wider back-end ALUs as well.*