From: bugzilla-daemon <bugzilla-daemon@libre-soc.org>
Date: Fri, 1 May 2020 19:12:35 +0000 (+0000)
Subject: [libre-riscv-dev] [Bug 296] idea: cyclic buffer between FUs and register file
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a8fdc87647a5eb1556a73ef69eeeb8660adb6e6c;p=libre-riscv-dev.git

[libre-riscv-dev] [Bug 296] idea: cyclic buffer between FUs and register file
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+From: bugzilla-daemon@libre-soc.org
+To: libre-riscv-dev@lists.libre-riscv.org
+Date: Fri, 01 May 2020 19:12:35 +0000
+X-Bugzilla-Reason: CC
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+X-Bugzilla-Product: Libre-SOC's first SoC
+X-Bugzilla-Component: Source Code
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+X-Bugzilla-Keywords: 
+X-Bugzilla-Severity: enhancement
+X-Bugzilla-Who: programmerjake@gmail.com
+X-Bugzilla-Status: CONFIRMED
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+X-Bugzilla-Priority: ---
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+Message-ID: <bug-296-13-VX5Rx3UnNh@https.bugs.libre-soc.org/>
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+Subject: [libre-riscv-dev] [Bug 296] idea: cyclic buffer between FUs and
+ register file
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