From: lkcl <lkcl@web>
Date: Fri, 24 Nov 2023 21:45:31 +0000 (+0000)
Subject: (no commit message)
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a907990dbd789014ea7ef8acbc604e6ac4e93bf4;p=libreriscv.git

---

diff --git a/meetings/dmitry_2023-11-24.mdwn b/meetings/dmitry_2023-11-24.mdwn
index 3f475b6f4..6616c2d3b 100644
--- a/meetings/dmitry_2023-11-24.mdwn
+++ b/meetings/dmitry_2023-11-24.mdwn
@@ -53,7 +53,7 @@ full feature set of SimpleV. Link to LibreSOC'
 # Defining SVPxxSingle
 
 Another point mentioned after Dmitry left is the need to define SVPxxSingle.
-[[sv/svp64-single]]
+[[openpower/sv/svp64-single]]
 
 For both RISC-V and PowerISA need to define: