From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Wed, 20 May 2020 17:24:16 +0000 (+0100)
Subject: correct import on shift_rot maskgen
X-Git-Tag: div_pipeline~1021
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a9094d0eca5b3697efb170fc2b474773bd838a13;p=soc.git

correct import on shift_rot maskgen
---

diff --git a/src/soc/fu/shift_rot/test/test_maskgen.py b/src/soc/fu/shift_rot/test/test_maskgen.py
index 93f38f24..5c7c2941 100644
--- a/src/soc/fu/shift_rot/test/test_maskgen.py
+++ b/src/soc/fu/shift_rot/test/test_maskgen.py
@@ -2,7 +2,7 @@ from nmigen import Signal, Module
 from nmigen.back.pysim import Simulator, Delay, Settle
 from nmigen.test.utils import FHDLTestCase
 from nmigen.cli import rtlil
-from soc.fu.alu.maskgen import MaskGen
+from soc.fu.shift_rot.maskgen import MaskGen
 from soc.decoder.helpers import MASK
 import random
 import unittest