From: Sebastien Bourdeauducq <sebastien@milkymist.org>
Date: Thu, 21 Mar 2013 09:40:02 +0000 (+0100)
Subject: genlib/cdc/MultiReg: output clock domain defaults to sys
X-Git-Tag: 24jan2021_ls180~2099^2~630
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a94bf3b2c5f235ddb4e28b5e5ef0caa6c147f5fe;p=litex.git

genlib/cdc/MultiReg: output clock domain defaults to sys
---

diff --git a/migen/genlib/cdc.py b/migen/genlib/cdc.py
index a7c2dd85..7aff864d 100644
--- a/migen/genlib/cdc.py
+++ b/migen/genlib/cdc.py
@@ -23,7 +23,7 @@ class MultiRegImpl:
 		return Fragment(comb, {self.odomain: o_sync})
 
 class MultiReg(Special):
-	def __init__(self, i, o, odomain, n=2):
+	def __init__(self, i, o, odomain="sys", n=2):
 		Special.__init__(self)
 		self.i = i
 		self.o = o