From: Nanley Chery <nanley.g.chery@intel.com>
Date: Fri, 9 Aug 2019 17:41:38 +0000 (-0700)
Subject: isl: Disable CCS_D on Gen12+
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a94cb6503f88c81cf95227702f88e29944ec4766;p=mesa.git

isl: Disable CCS_D on Gen12+

Clear-only compression no longer exists on TGL.

v2. Add BSpec reference. (Sagar)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
---

diff --git a/src/intel/isl/isl_format.c b/src/intel/isl/isl_format.c
index a36edb9662f..efd6936d4f6 100644
--- a/src/intel/isl/isl_format.c
+++ b/src/intel/isl/isl_format.c
@@ -533,8 +533,10 @@ bool
 isl_format_supports_ccs_d(const struct gen_device_info *devinfo,
                           enum isl_format format)
 {
-   /* Fast clears were first added on Ivy Bridge */
-   if (devinfo->gen < 7)
+   /* Clear-only compression was first added on Ivy Bridge and was last
+    * implemented on Ice lake (see BSpec: 43862).
+    */
+   if (devinfo->gen < 7 || devinfo->gen > 11)
       return false;
 
    if (!isl_format_supports_rendering(devinfo, format))