From: Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
Date: Fri, 9 Dec 2005 23:46:42 +0000 (+0000)
Subject: re PR testsuite/20772 (x86 tests should run on both i?86 and x86_64)
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a94d6f3b2227a0d31cb2008d27c10a154c7e4d7f;p=gcc.git

re PR testsuite/20772 (x86 tests should run on both i?86 and x86_64)

	PR testsuite/20772
	* g++.dg/eh/simd-1.C, g++.dg/eh/simd-2.C, g++.dg/opt/inline9.C,
	gcc.dg/20020418-1.c, gcc.dg/20031102-1.c, gcc.dg/ia64-sync-1.c,
	gcc.dg/ia64-sync-2.c, gcc.dg/ia64-sync-3.c, gcc.dg/ia64-sync-4.c,
	gcc.dg/ifcvt-fabs-1.c, gcc.dg/loop-3.c, gcc.dg/nested-calls-1.c,
	gcc.dg/pr20017.c, gcc.dg/smod-1.c, gcc.dg/sync-2.c,
	gcc.dg/tls/opt-3.c, gcc.dg/torture/badshift.c: Add x86_64 cases
	and/or merge with i?86 cases.

	* gcc.dg/tls/opt-3.c: Require effective target fpic.

From-SVN: r108324
---

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 02ed38b0119..c0944be9866 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,5 +1,16 @@
 2005-12-09  Kaveh R. Ghazi  <ghazi@caip.rutgers.edu>
 
+	PR testsuite/20772
+	* g++.dg/eh/simd-1.C, g++.dg/eh/simd-2.C, g++.dg/opt/inline9.C,
+	gcc.dg/20020418-1.c, gcc.dg/20031102-1.c, gcc.dg/ia64-sync-1.c,
+	gcc.dg/ia64-sync-2.c, gcc.dg/ia64-sync-3.c, gcc.dg/ia64-sync-4.c,
+	gcc.dg/ifcvt-fabs-1.c, gcc.dg/loop-3.c, gcc.dg/nested-calls-1.c,
+	gcc.dg/pr20017.c, gcc.dg/smod-1.c, gcc.dg/sync-2.c,
+	gcc.dg/tls/opt-3.c, gcc.dg/torture/badshift.c: Add x86_64 cases
+	and/or merge with i?86 cases.
+
+	* gcc.dg/tls/opt-3.c: Require effective target fpic.
+
 	PR testsuite/20772
 	* g++.dg/opt/life1.C, g++.old-deja/g++.abi/aggregates.C,
 	g++.old-deja/g++.abi/align.C, g++.old-deja/g++.abi/bitfields.C,
diff --git a/gcc/testsuite/g++.dg/eh/simd-1.C b/gcc/testsuite/g++.dg/eh/simd-1.C
index e7c30dbf3bd..465b7826da0 100644
--- a/gcc/testsuite/g++.dg/eh/simd-1.C
+++ b/gcc/testsuite/g++.dg/eh/simd-1.C
@@ -1,8 +1,7 @@
 // Test EH when V2SI SIMD registers are involved.
 // Contributed by Aldy Hernandez (aldy@quesejoda.com).
 // { dg-options "-O" }
-// { dg-options "-O -w" { target i?86-*-* } }
-// { dg-options "-O -w" { target { x86_64-*-* && ilp32 } } }
+// { dg-options "-O -w" { target { { i?86-*-* x86_64-*-* } && ilp32 } } }
 // { dg-do run }
 
 typedef int __attribute__((vector_size (8))) vecint;
diff --git a/gcc/testsuite/g++.dg/eh/simd-2.C b/gcc/testsuite/g++.dg/eh/simd-2.C
index bac1d765732..813930faeba 100644
--- a/gcc/testsuite/g++.dg/eh/simd-2.C
+++ b/gcc/testsuite/g++.dg/eh/simd-2.C
@@ -1,8 +1,7 @@
 // Test EH when V4SI SIMD registers are involved.
 // Contributed by Aldy Hernandez (aldy@quesejoda.com).
 // { dg-options "-O" }
-// { dg-options "-O -w" { target i?86-*-* } }
-// { dg-options "-O -w" { target { x86_64-*-* && ilp32 } } }
+// { dg-options "-O -w" { target { { i?86-*-* x86_64-*-* } && ilp32 } } }
 // { dg-options "-O -w -maltivec" { target powerpc*-*-linux* } }
 // { dg-xfail-if "" { "powerpc-*-eabispe*" "powerpc-ibm-aix*" } { "*" } { "" } }
 // { dg-do run }
diff --git a/gcc/testsuite/g++.dg/opt/inline9.C b/gcc/testsuite/g++.dg/opt/inline9.C
index 10ccb47dc79..10bc54ccd95 100644
--- a/gcc/testsuite/g++.dg/opt/inline9.C
+++ b/gcc/testsuite/g++.dg/opt/inline9.C
@@ -3,7 +3,7 @@
 // Testcase by Alan Modra <amodra@bigpond.net.au>
 // { dg-do run }
 // { dg-options "-O" }
-// { dg-options "-O -mtune=i686" { target i?86-*-* } }
+// { dg-options "-O -mtune=i686" { target { { i?86-*-* x86_64-*-* } && ilp32 } } }
 
 struct thread_info
 {
diff --git a/gcc/testsuite/gcc.dg/20020418-1.c b/gcc/testsuite/gcc.dg/20020418-1.c
index 308bfa3a266..7314ec000ef 100644
--- a/gcc/testsuite/gcc.dg/20020418-1.c
+++ b/gcc/testsuite/gcc.dg/20020418-1.c
@@ -1,7 +1,7 @@
 /* PR optimization/5887 */
 /* { dg-do compile } */
 /* { dg-options "-O2" } */
-/* { dg-options "-O2 -msse -ffast-math" { target i?86-*-* } } */
+/* { dg-options "-O2 -msse -ffast-math" { target i?86-*-* x86_64-*-* } } */
 
 void bar (float *a, float *b);
 
diff --git a/gcc/testsuite/gcc.dg/20031102-1.c b/gcc/testsuite/gcc.dg/20031102-1.c
index 4da4e6a8cc0..5a02a704a26 100644
--- a/gcc/testsuite/gcc.dg/20031102-1.c
+++ b/gcc/testsuite/gcc.dg/20031102-1.c
@@ -3,7 +3,7 @@
 
 /* { dg-do run } */
 /* { dg-options "-O2" } */
-/* { dg-options "-O2 -march=i686" { target i686-*-* } } */
+/* { dg-options "-O2 -march=i686" { target { { i686-*-* x86_64-*-* } && ilp32 } } } */
 
 /* Verify that reload_cse_move2add doesn't add unexpected CLOBBERs. */
 
diff --git a/gcc/testsuite/gcc.dg/ia64-sync-1.c b/gcc/testsuite/gcc.dg/ia64-sync-1.c
index f58f8cb80c3..af1411c81a8 100644
--- a/gcc/testsuite/gcc.dg/ia64-sync-1.c
+++ b/gcc/testsuite/gcc.dg/ia64-sync-1.c
@@ -1,8 +1,7 @@
 /* { dg-do run } */
 /* { dg-require-effective-target sync_int_long } */
 /* { dg-options } */
-/* { dg-options "-march=i486" { target i?86-*-* } } */
-/* { dg-options "-march=i486" { target { x86_64-*-* && ilp32 } } } */
+/* { dg-options "-march=i486" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
 
 /* Test basic functionality of the intrinsics.  The operations should
    not be optimized away if no one checks the return values.  */
diff --git a/gcc/testsuite/gcc.dg/ia64-sync-2.c b/gcc/testsuite/gcc.dg/ia64-sync-2.c
index 000a2678fea..73e793f91c7 100644
--- a/gcc/testsuite/gcc.dg/ia64-sync-2.c
+++ b/gcc/testsuite/gcc.dg/ia64-sync-2.c
@@ -1,8 +1,7 @@
 /* { dg-do run } */
 /* { dg-require-effective-target sync_int_long } */
 /* { dg-options } */
-/* { dg-options "-march=i486" { target i?86-*-* } } */
-/* { dg-options "-march=i486" { target { x86_64-*-* && ilp32 } } } */
+/* { dg-options "-march=i486" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
 
 /* Test basic functionality of the intrinsics.  */
 
diff --git a/gcc/testsuite/gcc.dg/ia64-sync-3.c b/gcc/testsuite/gcc.dg/ia64-sync-3.c
index 46f6294aac2..9e8d40c9168 100644
--- a/gcc/testsuite/gcc.dg/ia64-sync-3.c
+++ b/gcc/testsuite/gcc.dg/ia64-sync-3.c
@@ -1,8 +1,7 @@
 /* { dg-do run } */
 /* { dg-require-effective-target sync_int_long } */
 /* { dg-options } */
-/* { dg-options "-march=i486" { target i?86-*-* } } */
-/* { dg-options "-march=i486" { target { x86_64-*-* && ilp32 } } } */
+/* { dg-options "-march=i486" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
 
 /* Test basic functionality of the intrinsics.  */
 
diff --git a/gcc/testsuite/gcc.dg/ia64-sync-4.c b/gcc/testsuite/gcc.dg/ia64-sync-4.c
index baeb8527c87..8cd3940a89c 100644
--- a/gcc/testsuite/gcc.dg/ia64-sync-4.c
+++ b/gcc/testsuite/gcc.dg/ia64-sync-4.c
@@ -1,8 +1,7 @@
 /* { dg-do compile } */
 /* { dg-require-effective-target sync_int_long } */
 /* { dg-options "-O2 -finline-functions" } */
-/* { dg-options "-march=i486" { target i?86-*-* } } */
-/* { dg-options "-march=i486" { target { x86_64-*-* && ilp32 } } } */
+/* { dg-options "-march=i486" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
 
 /* Test inlining __sync_bool_compare_and_swap.  */
 
diff --git a/gcc/testsuite/gcc.dg/ifcvt-fabs-1.c b/gcc/testsuite/gcc.dg/ifcvt-fabs-1.c
index 6808a8f5843..bdf6b3975a2 100644
--- a/gcc/testsuite/gcc.dg/ifcvt-fabs-1.c
+++ b/gcc/testsuite/gcc.dg/ifcvt-fabs-1.c
@@ -1,6 +1,6 @@
 /* { dg-do run } */
 /* { dg-options "-O" } */
-/* { dg-options "-O -march=i686" { target i686-*-* } } */
+/* { dg-options "-O -march=i686" { target { { i686-*-* x86_64-*-* } && ilp32 } } } */
 
 extern void abort(void);
 
diff --git a/gcc/testsuite/gcc.dg/loop-3.c b/gcc/testsuite/gcc.dg/loop-3.c
index f7ceaddb899..06428d92feb 100644
--- a/gcc/testsuite/gcc.dg/loop-3.c
+++ b/gcc/testsuite/gcc.dg/loop-3.c
@@ -3,7 +3,7 @@
 
 /* { dg-do compile } */
 /* { dg-options "-O3" } */
-/* { dg-options "-O3 -mtune=i386" { target { i?86-*-* && ilp32 } } } */
+/* { dg-options "-O3 -mtune=i386" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
 
 #if defined(STACK_SIZE) && (STACK_SIZE < 65536)
 # define BYTEMEM_SIZE 10000L
diff --git a/gcc/testsuite/gcc.dg/nested-calls-1.c b/gcc/testsuite/gcc.dg/nested-calls-1.c
index b3f08becac0..89fdc88c630 100644
--- a/gcc/testsuite/gcc.dg/nested-calls-1.c
+++ b/gcc/testsuite/gcc.dg/nested-calls-1.c
@@ -3,7 +3,7 @@
 
 /* { dg-do run } */
 /* { dg-options "-std=c99 -O -fno-inline" } */
-/* { dg-options "-std=c99 -O -fno-inline -mtune=i686" { target { i?86-*-* && ilp32 } } } */
+/* { dg-options "-std=c99 -O -fno-inline -mtune=i686" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
 
 #include <limits.h>
 
diff --git a/gcc/testsuite/gcc.dg/pr20017.c b/gcc/testsuite/gcc.dg/pr20017.c
index 16bd72b315d..1fd6d586ec7 100644
--- a/gcc/testsuite/gcc.dg/pr20017.c
+++ b/gcc/testsuite/gcc.dg/pr20017.c
@@ -6,7 +6,7 @@
 
 /* { dg-do compile } */
 /* { dg-options "-O1" } */
-/* { dg-options "-O1 -march=i386" { target { i?86-*-* && ilp32 } } } */
+/* { dg-options "-O1 -march=i386" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
 
 int
 foo (int *buf, int *p)
diff --git a/gcc/testsuite/gcc.dg/smod-1.c b/gcc/testsuite/gcc.dg/smod-1.c
index e75978af595..8ff60de1362 100644
--- a/gcc/testsuite/gcc.dg/smod-1.c
+++ b/gcc/testsuite/gcc.dg/smod-1.c
@@ -3,7 +3,7 @@
 
 /* { dg-do run } */
 /* { dg-options "-std=c99" } */
-/* { dg-options "-std=c99 -mtune=i486" { target { i?86-*-* && ilp32 } } } */
+/* { dg-options "-std=c99 -mtune=i486" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
 
 #include <limits.h>
 
diff --git a/gcc/testsuite/gcc.dg/sync-2.c b/gcc/testsuite/gcc.dg/sync-2.c
index 8b92eadd598..ab2e27632a1 100644
--- a/gcc/testsuite/gcc.dg/sync-2.c
+++ b/gcc/testsuite/gcc.dg/sync-2.c
@@ -1,7 +1,6 @@
 /* { dg-do run } */
 /* { dg-require-effective-target sync_char_short } */
-/* { dg-options "-march=i486" { target i?86-*-* } } */
-/* { dg-options "-march=i486" { target { x86_64-*-* && ilp32 } } } */
+/* { dg-options "-march=i486" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
 
 /* Test functionality of the intrinsics for 'short' and 'char'.  */
 
diff --git a/gcc/testsuite/gcc.dg/tls/opt-3.c b/gcc/testsuite/gcc.dg/tls/opt-3.c
index e59e5110b5b..0bec5303c28 100644
--- a/gcc/testsuite/gcc.dg/tls/opt-3.c
+++ b/gcc/testsuite/gcc.dg/tls/opt-3.c
@@ -1,7 +1,8 @@
 /* { dg-do compile } */
 /* { dg-options "-O2 -fpic" } */
-/* { dg-options "-O2 -fpic -mregparm=3" { target i?86-*-* } } */
+/* { dg-options "-O2 -fpic -mregparm=3" { target i?86-*-* x86_64-*-* } } */
 /* { dg-require-effective-target tls } */
+/* { dg-require-effective-target fpic } */
 
 extern __thread int i, j, k;
 extern void bar(int *, int *, int *);
diff --git a/gcc/testsuite/gcc.dg/torture/badshift.c b/gcc/testsuite/gcc.dg/torture/badshift.c
index dec71cfa2d1..7288a374576 100644
--- a/gcc/testsuite/gcc.dg/torture/badshift.c
+++ b/gcc/testsuite/gcc.dg/torture/badshift.c
@@ -2,7 +2,7 @@
 
 /* { dg-do run } */
 /* { dg-options "" } */
-/* { dg-options "-march=i386" { target { i?86-*-* && ilp32 } } } */
+/* { dg-options "-march=i386" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
 
 /* We used to optimize the DImode shift-by-32 to zero because in combine
    we turned: