From: Jan Beulich Date: Wed, 30 Oct 2019 08:09:13 +0000 (+0100) Subject: x86: add tests to cover defaulting of operand sizes for ambiguous insns X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a961a1e1749443516d8fe6e0570cf808a09e8f89;p=binutils-gdb.git x86: add tests to cover defaulting of operand sizes for ambiguous insns Prior to changing the logic in the assembler install tests to make sure the present defaulting of operand sizes won't get broken. There are a few anomalies pointed out by this: - arithmetic insns (add, sub, etc) allow defaulting when their immediate fits in (signed) 8 bits, but they fail to assemble with larger values, - mov, other than arithmetic insns, doesn't allow any defaulting, - movsx/movzx default to byte sources (in AT&T mode), and their special casing needs to be adjusted first - bt and friends allow defaulting, while shl and friends don't, - ambiguous AVX and AVX512 insns don't allow defaulting. This should ultimately all become consistent (perhaps with the exception some of the SIMD insns); respective tests will be added to the test cases here as the issues get addressed. --- diff --git a/gas/ChangeLog b/gas/ChangeLog index 4a2a30965af..bd080bff1b1 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,10 @@ +2019-10-30 Jan Beulich + + * testsuite/gas/i386/noreg16.d, testsuite/gas/i386/noreg16.s, + testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg32.s, + testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.s: New. + * testsuite/gas/i386/i386.exp: Run new tests. + 2019-10-30 Jan Beulich * config/tc-i386.c (optimize_encoding): Adjust opcodes compared diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp index 80bb0d5fc3e..ff2d235713a 100644 --- a/gas/testsuite/gas/i386/i386.exp +++ b/gas/testsuite/gas/i386/i386.exp @@ -128,6 +128,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]] run_dump_test "nops-5-i686" run_dump_test "nops-6" run_dump_test "nops-7" + run_dump_test "noreg16" + run_dump_test "noreg32" run_dump_test "addr16" run_dump_test "addr32" run_list_test "oversized16" "-al" @@ -697,6 +699,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t run_dump_test "x86-64-nops-5" run_dump_test "x86-64-nops-5-k8" run_dump_test "x86-64-nops-7" + run_dump_test "noreg64" run_list_test "cvtsi2sX" run_dump_test "x86-64-sse4_1" run_dump_test "x86-64-sse4_1-intel" diff --git a/gas/testsuite/gas/i386/noreg16.d b/gas/testsuite/gas/i386/noreg16.d new file mode 100644 index 00000000000..66f0df6fe42 --- /dev/null +++ b/gas/testsuite/gas/i386/noreg16.d @@ -0,0 +1,67 @@ +#objdump: -dwMi8086 +#name: 16-bit insns not sizeable through register operands + +.*: +file format .* + +Disassembly of section .text: + +0+ : + *[a-f0-9]+: 83 17 01 adcw \$0x1,\(%bx\) + *[a-f0-9]+: 83 07 01 addw \$0x1,\(%bx\) + *[a-f0-9]+: 83 27 01 andw \$0x1,\(%bx\) + *[a-f0-9]+: 0f ba 27 01 btw \$0x1,\(%bx\) + *[a-f0-9]+: 0f ba 3f 01 btcw \$0x1,\(%bx\) + *[a-f0-9]+: 0f ba 37 01 btrw \$0x1,\(%bx\) + *[a-f0-9]+: 0f ba 2f 01 btsw \$0x1,\(%bx\) + *[a-f0-9]+: ff 17 call \*\(%bx\) + *[a-f0-9]+: 83 3f 01 cmpw \$0x1,\(%bx\) + *[a-f0-9]+: f2 0f 2a 07 cvtsi2sdl \(%bx\),%xmm0 + *[a-f0-9]+: f3 0f 2a 07 cvtsi2ssl \(%bx\),%xmm0 + *[a-f0-9]+: d8 07 fadds \(%bx\) + *[a-f0-9]+: d8 17 fcoms \(%bx\) + *[a-f0-9]+: d8 1f fcomps \(%bx\) + *[a-f0-9]+: d8 37 fdivs \(%bx\) + *[a-f0-9]+: d8 3f fdivrs \(%bx\) + *[a-f0-9]+: de 07 fiadds \(%bx\) + *[a-f0-9]+: de 17 ficoms \(%bx\) + *[a-f0-9]+: de 1f ficomps \(%bx\) + *[a-f0-9]+: de 37 fidivs \(%bx\) + *[a-f0-9]+: de 3f fidivrs \(%bx\) + *[a-f0-9]+: df 07 filds \(%bx\) + *[a-f0-9]+: de 0f fimuls \(%bx\) + *[a-f0-9]+: df 17 fists \(%bx\) + *[a-f0-9]+: df 1f fistps \(%bx\) + *[a-f0-9]+: df 0f fisttps \(%bx\) + *[a-f0-9]+: de 27 fisubs \(%bx\) + *[a-f0-9]+: de 2f fisubrs \(%bx\) + *[a-f0-9]+: d9 07 flds \(%bx\) + *[a-f0-9]+: d8 0f fmuls \(%bx\) + *[a-f0-9]+: d9 17 fsts \(%bx\) + *[a-f0-9]+: d9 1f fstps \(%bx\) + *[a-f0-9]+: d8 27 fsubs \(%bx\) + *[a-f0-9]+: d8 2f fsubrs \(%bx\) + *[a-f0-9]+: ff 27 jmp \*\(%bx\) + *[a-f0-9]+: 0f 01 17 lgdtw \(%bx\) + *[a-f0-9]+: 0f 01 1f lidtw \(%bx\) + *[a-f0-9]+: 0f 00 17 lldt \(%bx\) + *[a-f0-9]+: 0f 01 37 lmsw \(%bx\) + *[a-f0-9]+: 0f 00 1f ltr \(%bx\) + *[a-f0-9]+: 8c 07 mov %es,\(%bx\) + *[a-f0-9]+: 8e 07 mov \(%bx\),%es + *[a-f0-9]+: 0f 1f 07 nopw \(%bx\) + *[a-f0-9]+: 83 0f 01 orw \$0x1,\(%bx\) + *[a-f0-9]+: 8f 07 popw \(%bx\) + *[a-f0-9]+: 07 pop %es + *[a-f0-9]+: f3 0f ae 27 ptwritel \(%bx\) + *[a-f0-9]+: ff 37 pushw \(%bx\) + *[a-f0-9]+: 06 push %es + *[a-f0-9]+: 83 1f 01 sbbw \$0x1,\(%bx\) + *[a-f0-9]+: 83 2f 01 subw \$0x1,\(%bx\) + *[a-f0-9]+: c5 fb 2a 07 vcvtsi2sdl \(%bx\),%xmm0,%xmm0 + *[a-f0-9]+: 62 f1 7f 08 2a 07 vcvtsi2sdl \(%bx\),%xmm0,%xmm0 + *[a-f0-9]+: c5 fa 2a 07 vcvtsi2ssl \(%bx\),%xmm0,%xmm0 + *[a-f0-9]+: 62 f1 7e 08 2a 07 vcvtsi2ssl \(%bx\),%xmm0,%xmm0 + *[a-f0-9]+: 62 f1 7f 08 7b 07 vcvtusi2sdl \(%bx\),%xmm0,%xmm0 + *[a-f0-9]+: 62 f1 7e 08 7b 07 vcvtusi2ssl \(%bx\),%xmm0,%xmm0 + *[a-f0-9]+: 83 37 01 xorw \$0x1,\(%bx\) +#pass diff --git a/gas/testsuite/gas/i386/noreg16.s b/gas/testsuite/gas/i386/noreg16.s new file mode 100644 index 00000000000..aff96d9a561 --- /dev/null +++ b/gas/testsuite/gas/i386/noreg16.s @@ -0,0 +1,61 @@ + .text + .code16 +noreg: + adc $1, (%bx) + add $1, (%bx) + and $1, (%bx) + bt $1, (%bx) + btc $1, (%bx) + btr $1, (%bx) + bts $1, (%bx) + call *(%bx) + cmp $1, (%bx) + cvtsi2sd (%bx), %xmm0 + cvtsi2ss (%bx), %xmm0 + fadd (%bx) + fcom (%bx) + fcomp (%bx) + fdiv (%bx) + fdivr (%bx) + fiadd (%bx) + ficom (%bx) + ficomp (%bx) + fidiv (%bx) + fidivr (%bx) + fild (%bx) + fimul (%bx) + fist (%bx) + fistp (%bx) + fisttp (%bx) + fisub (%bx) + fisubr (%bx) + fld (%bx) + fmul (%bx) + fst (%bx) + fstp (%bx) + fsub (%bx) + fsubr (%bx) + jmp *(%bx) + lgdt (%bx) + lidt (%bx) + lldt (%bx) + lmsw (%bx) + ltr (%bx) + mov %es, (%bx) + mov (%bx), %es + nop (%bx) + or $1, (%bx) + pop (%bx) + pop %es + ptwrite (%bx) + push (%bx) + push %es + sbb $1, (%bx) + sub $1, (%bx) + vcvtsi2sd (%bx), %xmm0, %xmm0 + {evex} vcvtsi2sd (%bx), %xmm0, %xmm0 + vcvtsi2ss (%bx), %xmm0, %xmm0 + {evex} vcvtsi2ss (%bx), %xmm0, %xmm0 + vcvtusi2sd (%bx), %xmm0, %xmm0 + vcvtusi2ss (%bx), %xmm0, %xmm0 + xor $1, (%bx) diff --git a/gas/testsuite/gas/i386/noreg32.d b/gas/testsuite/gas/i386/noreg32.d new file mode 100644 index 00000000000..0cdd5fa50c4 --- /dev/null +++ b/gas/testsuite/gas/i386/noreg32.d @@ -0,0 +1,67 @@ +#objdump: -dw +#name: 32-bit insns not sizeable through register operands + +.*: +file format .* + +Disassembly of section .text: + +0+ : + *[a-f0-9]+: 83 10 01 adcl \$0x1,\(%eax\) + *[a-f0-9]+: 83 00 01 addl \$0x1,\(%eax\) + *[a-f0-9]+: 83 20 01 andl \$0x1,\(%eax\) + *[a-f0-9]+: 0f ba 20 01 btl \$0x1,\(%eax\) + *[a-f0-9]+: 0f ba 38 01 btcl \$0x1,\(%eax\) + *[a-f0-9]+: 0f ba 30 01 btrl \$0x1,\(%eax\) + *[a-f0-9]+: 0f ba 28 01 btsl \$0x1,\(%eax\) + *[a-f0-9]+: ff 10 call \*\(%eax\) + *[a-f0-9]+: 83 38 01 cmpl \$0x1,\(%eax\) + *[a-f0-9]+: f2 0f 2a 00 cvtsi2sdl \(%eax\),%xmm0 + *[a-f0-9]+: f3 0f 2a 00 cvtsi2ssl \(%eax\),%xmm0 + *[a-f0-9]+: d8 00 fadds \(%eax\) + *[a-f0-9]+: d8 10 fcoms \(%eax\) + *[a-f0-9]+: d8 18 fcomps \(%eax\) + *[a-f0-9]+: d8 30 fdivs \(%eax\) + *[a-f0-9]+: d8 38 fdivrs \(%eax\) + *[a-f0-9]+: de 00 fiadds \(%eax\) + *[a-f0-9]+: de 10 ficoms \(%eax\) + *[a-f0-9]+: de 18 ficomps \(%eax\) + *[a-f0-9]+: de 30 fidivs \(%eax\) + *[a-f0-9]+: de 38 fidivrs \(%eax\) + *[a-f0-9]+: df 00 filds \(%eax\) + *[a-f0-9]+: de 08 fimuls \(%eax\) + *[a-f0-9]+: df 10 fists \(%eax\) + *[a-f0-9]+: df 18 fistps \(%eax\) + *[a-f0-9]+: df 08 fisttps \(%eax\) + *[a-f0-9]+: de 20 fisubs \(%eax\) + *[a-f0-9]+: de 28 fisubrs \(%eax\) + *[a-f0-9]+: d9 00 flds \(%eax\) + *[a-f0-9]+: d8 08 fmuls \(%eax\) + *[a-f0-9]+: d9 10 fsts \(%eax\) + *[a-f0-9]+: d9 18 fstps \(%eax\) + *[a-f0-9]+: d8 20 fsubs \(%eax\) + *[a-f0-9]+: d8 28 fsubrs \(%eax\) + *[a-f0-9]+: ff 20 jmp \*\(%eax\) + *[a-f0-9]+: 0f 01 10 lgdtl \(%eax\) + *[a-f0-9]+: 0f 01 18 lidtl \(%eax\) + *[a-f0-9]+: 0f 00 10 lldt \(%eax\) + *[a-f0-9]+: 0f 01 30 lmsw \(%eax\) + *[a-f0-9]+: 0f 00 18 ltr \(%eax\) + *[a-f0-9]+: 8c 00 mov %es,\(%eax\) + *[a-f0-9]+: 8e 00 mov \(%eax\),%es + *[a-f0-9]+: 0f 1f 00 nopl \(%eax\) + *[a-f0-9]+: 83 08 01 orl \$0x1,\(%eax\) + *[a-f0-9]+: 8f 00 popl \(%eax\) + *[a-f0-9]+: 07 pop %es + *[a-f0-9]+: f3 0f ae 20 ptwritel \(%eax\) + *[a-f0-9]+: ff 30 pushl \(%eax\) + *[a-f0-9]+: 06 push %es + *[a-f0-9]+: 83 18 01 sbbl \$0x1,\(%eax\) + *[a-f0-9]+: 83 28 01 subl \$0x1,\(%eax\) + *[a-f0-9]+: c5 fb 2a 00 vcvtsi2sdl \(%eax\),%xmm0,%xmm0 + *[a-f0-9]+: 62 f1 7f 08 2a 00 vcvtsi2sdl \(%eax\),%xmm0,%xmm0 + *[a-f0-9]+: c5 fa 2a 00 vcvtsi2ssl \(%eax\),%xmm0,%xmm0 + *[a-f0-9]+: 62 f1 7e 08 2a 00 vcvtsi2ssl \(%eax\),%xmm0,%xmm0 + *[a-f0-9]+: 62 f1 7f 08 7b 00 vcvtusi2sdl \(%eax\),%xmm0,%xmm0 + *[a-f0-9]+: 62 f1 7e 08 7b 00 vcvtusi2ssl \(%eax\),%xmm0,%xmm0 + *[a-f0-9]+: 83 30 01 xorl \$0x1,\(%eax\) +#pass diff --git a/gas/testsuite/gas/i386/noreg32.s b/gas/testsuite/gas/i386/noreg32.s new file mode 100644 index 00000000000..d6a4cad29e9 --- /dev/null +++ b/gas/testsuite/gas/i386/noreg32.s @@ -0,0 +1,60 @@ + .text +noreg: + adc $1, (%eax) + add $1, (%eax) + and $1, (%eax) + bt $1, (%eax) + btc $1, (%eax) + btr $1, (%eax) + bts $1, (%eax) + call *(%eax) + cmp $1, (%eax) + cvtsi2sd (%eax), %xmm0 + cvtsi2ss (%eax), %xmm0 + fadd (%eax) + fcom (%eax) + fcomp (%eax) + fdiv (%eax) + fdivr (%eax) + fiadd (%eax) + ficom (%eax) + ficomp (%eax) + fidiv (%eax) + fidivr (%eax) + fild (%eax) + fimul (%eax) + fist (%eax) + fistp (%eax) + fisttp (%eax) + fisub (%eax) + fisubr (%eax) + fld (%eax) + fmul (%eax) + fst (%eax) + fstp (%eax) + fsub (%eax) + fsubr (%eax) + jmp *(%eax) + lgdt (%eax) + lidt (%eax) + lldt (%eax) + lmsw (%eax) + ltr (%eax) + mov %es, (%eax) + mov (%eax), %es + nop (%eax) + or $1, (%eax) + pop (%eax) + pop %es + ptwrite (%eax) + push (%eax) + push %es + sbb $1, (%eax) + sub $1, (%eax) + vcvtsi2sd (%eax), %xmm0, %xmm0 + {evex} vcvtsi2sd (%eax), %xmm0, %xmm0 + vcvtsi2ss (%eax), %xmm0, %xmm0 + {evex} vcvtsi2ss (%eax), %xmm0, %xmm0 + vcvtusi2sd (%eax), %xmm0, %xmm0 + vcvtusi2ss (%eax), %xmm0, %xmm0 + xor $1, (%eax) diff --git a/gas/testsuite/gas/i386/noreg64.d b/gas/testsuite/gas/i386/noreg64.d new file mode 100644 index 00000000000..fd4fca7182f --- /dev/null +++ b/gas/testsuite/gas/i386/noreg64.d @@ -0,0 +1,67 @@ +#objdump: -dw +#name: 64-bit insns not sizeable through register operands + +.*: +file format .* + +Disassembly of section .text: + +0+ : + *[a-f0-9]+: 83 10 01 adcl \$0x1,\(%rax\) + *[a-f0-9]+: 83 00 01 addl \$0x1,\(%rax\) + *[a-f0-9]+: 83 20 01 andl \$0x1,\(%rax\) + *[a-f0-9]+: 0f ba 20 01 btl \$0x1,\(%rax\) + *[a-f0-9]+: 0f ba 38 01 btcl \$0x1,\(%rax\) + *[a-f0-9]+: 0f ba 30 01 btrl \$0x1,\(%rax\) + *[a-f0-9]+: 0f ba 28 01 btsl \$0x1,\(%rax\) + *[a-f0-9]+: ff 10 callq \*\(%rax\) + *[a-f0-9]+: 83 38 01 cmpl \$0x1,\(%rax\) + *[a-f0-9]+: f2 0f 2a 00 cvtsi2sdl \(%rax\),%xmm0 + *[a-f0-9]+: f3 0f 2a 00 cvtsi2ssl \(%rax\),%xmm0 + *[a-f0-9]+: d8 00 fadds \(%rax\) + *[a-f0-9]+: d8 10 fcoms \(%rax\) + *[a-f0-9]+: d8 18 fcomps \(%rax\) + *[a-f0-9]+: d8 30 fdivs \(%rax\) + *[a-f0-9]+: d8 38 fdivrs \(%rax\) + *[a-f0-9]+: de 00 fiadds \(%rax\) + *[a-f0-9]+: de 10 ficoms \(%rax\) + *[a-f0-9]+: de 18 ficomps \(%rax\) + *[a-f0-9]+: de 30 fidivs \(%rax\) + *[a-f0-9]+: de 38 fidivrs \(%rax\) + *[a-f0-9]+: df 00 filds \(%rax\) + *[a-f0-9]+: de 08 fimuls \(%rax\) + *[a-f0-9]+: df 10 fists \(%rax\) + *[a-f0-9]+: df 18 fistps \(%rax\) + *[a-f0-9]+: df 08 fisttps \(%rax\) + *[a-f0-9]+: de 20 fisubs \(%rax\) + *[a-f0-9]+: de 28 fisubrs \(%rax\) + *[a-f0-9]+: d9 00 flds \(%rax\) + *[a-f0-9]+: d8 08 fmuls \(%rax\) + *[a-f0-9]+: d9 10 fsts \(%rax\) + *[a-f0-9]+: d9 18 fstps \(%rax\) + *[a-f0-9]+: d8 20 fsubs \(%rax\) + *[a-f0-9]+: d8 28 fsubrs \(%rax\) + *[a-f0-9]+: ff 20 jmpq \*\(%rax\) + *[a-f0-9]+: 0f 01 10 lgdt \(%rax\) + *[a-f0-9]+: 0f 01 18 lidt \(%rax\) + *[a-f0-9]+: 0f 00 10 lldt \(%rax\) + *[a-f0-9]+: 0f 01 30 lmsw \(%rax\) + *[a-f0-9]+: 0f 00 18 ltr \(%rax\) + *[a-f0-9]+: 8c 00 mov %es,\(%rax\) + *[a-f0-9]+: 8e 00 mov \(%rax\),%es + *[a-f0-9]+: 0f 1f 00 nopl \(%rax\) + *[a-f0-9]+: 83 08 01 orl \$0x1,\(%rax\) + *[a-f0-9]+: 8f 00 popq \(%rax\) + *[a-f0-9]+: 0f a1 popq %fs + *[a-f0-9]+: f3 0f ae 20 ptwritel \(%rax\) + *[a-f0-9]+: ff 30 pushq \(%rax\) + *[a-f0-9]+: 0f a0 pushq %fs + *[a-f0-9]+: 83 18 01 sbbl \$0x1,\(%rax\) + *[a-f0-9]+: 83 28 01 subl \$0x1,\(%rax\) + *[a-f0-9]+: c5 fb 2a 00 vcvtsi2sdl \(%rax\),%xmm0,%xmm0 + *[a-f0-9]+: 62 61 7f 08 2a 38 vcvtsi2sdl \(%rax\),%xmm0,%xmm31 + *[a-f0-9]+: c5 fa 2a 00 vcvtsi2ssl \(%rax\),%xmm0,%xmm0 + *[a-f0-9]+: 62 61 7e 08 2a 38 vcvtsi2ssl \(%rax\),%xmm0,%xmm31 + *[a-f0-9]+: 62 f1 7f 08 7b 00 vcvtusi2sdl \(%rax\),%xmm0,%xmm0 + *[a-f0-9]+: 62 f1 7e 08 7b 00 vcvtusi2ssl \(%rax\),%xmm0,%xmm0 + *[a-f0-9]+: 83 30 01 xorl \$0x1,\(%rax\) +#pass diff --git a/gas/testsuite/gas/i386/noreg64.s b/gas/testsuite/gas/i386/noreg64.s new file mode 100644 index 00000000000..c50d76a180d --- /dev/null +++ b/gas/testsuite/gas/i386/noreg64.s @@ -0,0 +1,60 @@ + .text +noreg: + adc $1, (%rax) + add $1, (%rax) + and $1, (%rax) + bt $1, (%rax) + btc $1, (%rax) + btr $1, (%rax) + bts $1, (%rax) + call *(%rax) + cmp $1, (%rax) + cvtsi2sd (%rax), %xmm0 + cvtsi2ss (%rax), %xmm0 + fadd (%rax) + fcom (%rax) + fcomp (%rax) + fdiv (%rax) + fdivr (%rax) + fiadd (%rax) + ficom (%rax) + ficomp (%rax) + fidiv (%rax) + fidivr (%rax) + fild (%rax) + fimul (%rax) + fist (%rax) + fistp (%rax) + fisttp (%rax) + fisub (%rax) + fisubr (%rax) + fld (%rax) + fmul (%rax) + fst (%rax) + fstp (%rax) + fsub (%rax) + fsubr (%rax) + jmp *(%rax) + lgdt (%rax) + lidt (%rax) + lldt (%rax) + lmsw (%rax) + ltr (%rax) + mov %es, (%rax) + mov (%rax), %es + nop (%rax) + or $1, (%rax) + pop (%rax) + pop %fs + ptwrite (%rax) + push (%rax) + push %fs + sbb $1, (%rax) + sub $1, (%rax) + vcvtsi2sd (%rax), %xmm0, %xmm0 + vcvtsi2sd (%rax), %xmm0, %xmm31 + vcvtsi2ss (%rax), %xmm0, %xmm0 + vcvtsi2ss (%rax), %xmm0, %xmm31 + vcvtusi2sd (%rax), %xmm0, %xmm0 + vcvtusi2ss (%rax), %xmm0, %xmm0 + xor $1, (%rax)