From: lkcl Date: Sun, 16 Apr 2023 13:04:06 +0000 (+0100) Subject: (no commit message) X-Git-Tag: opf_rfc_ls009_v1~10 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a963b619a40b002a7f3a63686b954ddc2fdf5a9e;p=libreriscv.git --- diff --git a/openpower/sv/remap.mdwn b/openpower/sv/remap.mdwn index bed7cdf6f..fe2055661 100644 --- a/openpower/sv/remap.mdwn +++ b/openpower/sv/remap.mdwn @@ -338,7 +338,8 @@ Vector Reduce Mode issues a deterministic tree-reduction schedule to the underly In Horizontal-First Mode, Vector-result reduction **requires** the destination to be a Vector, which will be used to store -intermediary results. +intermediary results, in order to achieve a correct final +result. Given that the tree-reduction schedule is deterministic, Interrupts and exceptions @@ -409,7 +410,9 @@ It may be better to perform a pre-copy of the values, compressing them (VREDUCE-style) into a contiguous block, which will guarantee that the result goes into the very first element of the destination vector, in which case clearly no follow-up -predicated vector-to-scalar MV operation is needed. +predicated vector-to-scalar MV operation is needed. A VREDUCE effect +is achieved by setting just a source predicate mask on Twin-Predicated +operations. **Usage conditions**