From: Michael Meissner <meissner@linux.vnet.ibm.com>
Date: Fri, 11 Nov 2016 19:12:12 +0000 (+0000)
Subject: re PR target/78243 (incorrect byte offset in vextractuh with -mcpu=power9)
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=a9c1825cdad013d6551e98ca3cadcf6d28a9ec48;p=gcc.git

re PR target/78243 (incorrect byte offset in vextractuh with -mcpu=power9)

2016-11-11  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/78243
	* config/rs6000/vsx.md (vsx_extract_<mode>_p9): Correct the
	element order for little endian ordering.

	* config/rs6000/altivec.md (reduc_plus_scal_<mode>): Use
	VECTOR_ELT_ORDER_BIG and not BYTES_BIG_ENDIAN to adjust element
	number.

From-SVN: r242317
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 7dd5931b839..401151205d9 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,13 @@
+2016-11-11  Michael Meissner  <meissner@linux.vnet.ibm.com>
+
+	PR target/78243
+	* config/rs6000/vsx.md (vsx_extract_<mode>_p9): Correct the
+	element order for little endian ordering.
+
+	* config/rs6000/altivec.md (reduc_plus_scal_<mode>): Use
+	VECTOR_ELT_ORDER_BIG and not BYTES_BIG_ENDIAN to adjust element
+	number.
+
 2016-11-11  Uros Bizjak  <ubizjak@gmail.com>
 
 	PR target/78310
diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md
index 5cac839da28..802aa7459af 100644
--- a/gcc/config/rs6000/altivec.md
+++ b/gcc/config/rs6000/altivec.md
@@ -2785,7 +2785,7 @@
   rtx vtmp1 = gen_reg_rtx (V4SImode);
   rtx vtmp2 = gen_reg_rtx (<MODE>mode);
   rtx dest = gen_lowpart (V4SImode, vtmp2);
-  int elt = BYTES_BIG_ENDIAN ? GET_MODE_NUNITS (<MODE>mode) - 1 : 0;
+  int elt = VECTOR_ELT_ORDER_BIG ? GET_MODE_NUNITS (<MODE>mode) - 1 : 0;
 
   emit_insn (gen_altivec_vspltisw (vzero, const0_rtx));
   emit_insn (gen_altivec_vsum4s<VI_char>s (vtmp1, operands[1], vzero));
diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
index ebb0f6dc099..c5a57cbebb6 100644
--- a/gcc/config/rs6000/vsx.md
+++ b/gcc/config/rs6000/vsx.md
@@ -2542,10 +2542,13 @@
   "VECTOR_MEM_VSX_P (<MODE>mode) && TARGET_VEXTRACTUB
    && TARGET_VSX_SMALL_INTEGER"
 {
-  /* Note, the element number has already been adjusted for endianness, so we
-     don't have to adjust it here.  */
-  int unit_size = GET_MODE_UNIT_SIZE (<MODE>mode);
-  HOST_WIDE_INT offset = unit_size * INTVAL (operands[2]);
+  HOST_WIDE_INT elt = INTVAL (operands[2]);
+  HOST_WIDE_INT elt_adj = (!VECTOR_ELT_ORDER_BIG
+			   ? GET_MODE_NUNITS (<MODE>mode) - 1 - elt
+			   : elt);
+
+  HOST_WIDE_INT unit_size = GET_MODE_UNIT_SIZE (<MODE>mode);
+  HOST_WIDE_INT offset = unit_size * elt_adj;
 
   operands[2] = GEN_INT (offset);
   if (unit_size == 4)