From: Uros Bizjak <ubizjak@gmail.com>
Date: Sun, 20 Nov 2011 19:17:08 +0000 (+0100)
Subject: i386.md (UNSPEC_MOVNTI): Remove.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=aa198500fe174e80672d8145a9dc1c614364a0eb;p=gcc.git

i386.md (UNSPEC_MOVNTI): Remove.

	* config/i386/i386.md (UNSPEC_MOVNTI): Remove.
	(UNSPEC_MOVNTQ): New unspec.
	* config/i386/mmx.md (sse_movntq): Rename from sse_movntdi.
	Use UNSPEC_MOVNTQ instead of UNSPEC_MOVNT.
	* config/i386/sse.md (sse2_movnti<mode>): Use UNSPEC_MOVNT instead of
	UNSPEC_MOVNTI.
	(STORENT_MODE): Add DI and V4DI modes.

From-SVN: r181531
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 69aa0fb0e28..d2ed66a97a9 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,13 @@
+2011-11-20  Uros Bizjak  <ubizjak@gmail.com>
+
+	* config/i386/i386.md (UNSPEC_MOVNTI): Remove.
+	(UNSPEC_MOVNTQ): New unspec.
+	* config/i386/mmx.md (sse_movntq): Rename from sse_movntdi.
+	Use UNSPEC_MOVNTQ instead of UNSPEC_MOVNT.
+	* config/i386/sse.md (sse2_movnti<mode>): Use UNSPEC_MOVNT instead of
+	UNSPEC_MOVNTI.
+	(STORENT_MODE): Add DI and V4DI modes.
+
 2011-11-20  Nathan Sidwell  <nathan@acm.org>
 
 	PR gcov-profile/51113
@@ -119,7 +129,7 @@
 	(avr_const_address_lo16): New static function.
 	(avr_assemble_integer): Use it to handle 3-byte integers.
 	(avr_emit_movmemhi, avr_out_movmem): New functions.
-	
+
 	* config/avr/predicates.md (nox_general_operand): Handle new
 	address spaces.
 	* config/avr/avr.md (unspec): Add UNSPEC_MOVMEM.
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index e1975246059..d92f8e2c631 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -26415,7 +26415,7 @@ static const struct builtin_description bdesc_special_args[] =
 
   /* SSE or 3DNow!A  */
   { OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_3DNOW_A, CODE_FOR_sse_sfence, "__builtin_ia32_sfence", IX86_BUILTIN_SFENCE, UNKNOWN, (int) VOID_FTYPE_VOID },
-  { OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_3DNOW_A, CODE_FOR_sse_movntdi, "__builtin_ia32_movntq", IX86_BUILTIN_MOVNTQ, UNKNOWN, (int) VOID_FTYPE_PULONGLONG_ULONGLONG },
+  { OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_3DNOW_A, CODE_FOR_sse_movntq, "__builtin_ia32_movntq", IX86_BUILTIN_MOVNTQ, UNKNOWN, (int) VOID_FTYPE_PULONGLONG_ULONGLONG },
 
   /* SSE2 */
   { OPTION_MASK_ISA_SSE2, CODE_FOR_sse2_lfence, "__builtin_ia32_lfence", IX86_BUILTIN_LFENCE, UNKNOWN, (int) VOID_FTYPE_VOID },
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index daf1387edfe..912c17229a2 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -115,8 +115,8 @@
   UNSPEC_FIX_NOTRUNC
   UNSPEC_MASKMOV
   UNSPEC_MOVMSK
+  UNSPEC_MOVNTQ
   UNSPEC_MOVNT
-  UNSPEC_MOVNTI
   UNSPEC_MOVU
   UNSPEC_RCP
   UNSPEC_RSQRT
diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md
index f76834e5ab2..7fa072eb6fe 100644
--- a/gcc/config/i386/mmx.md
+++ b/gcc/config/i386/mmx.md
@@ -329,10 +329,10 @@
   DONE;
 })
 
-(define_insn "sse_movntdi"
+(define_insn "sse_movntq"
   [(set (match_operand:DI 0 "memory_operand" "=m")
 	(unspec:DI [(match_operand:DI 1 "register_operand" "y")]
-		   UNSPEC_MOVNT))]
+		   UNSPEC_MOVNTQ))]
   "TARGET_SSE || TARGET_3DNOW_A"
   "movntq\t{%1, %0|%0, %1}"
   [(set_attr "type" "mmxmov")
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index e64864aa6da..89559966f0e 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -576,7 +576,7 @@
 (define_insn "sse2_movnti<mode>"
   [(set (match_operand:SWI48 0 "memory_operand" "=m")
 	(unspec:SWI48 [(match_operand:SWI48 1 "register_operand" "r")]
-		      UNSPEC_MOVNTI))]
+		      UNSPEC_MOVNT))]
   "TARGET_SSE2"
   "movnti\t{%1, %0|%0, %1}"
   [(set_attr "type" "ssemov")
@@ -614,8 +614,9 @@
 
 ;; Modes handled by storent patterns.
 (define_mode_iterator STORENT_MODE
-  [(SI "TARGET_SSE2") (SF "TARGET_SSE4A") (DF "TARGET_SSE4A")
-   (V2DI "TARGET_SSE2")
+  [(DI "TARGET_SSE2 && TARGET_64BIT") (SI "TARGET_SSE2")
+   (SF "TARGET_SSE4A") (DF "TARGET_SSE4A")
+   (V4DI "TARGET_AVX") (V2DI "TARGET_SSE2")
    (V8SF "TARGET_AVX") V4SF
    (V4DF "TARGET_AVX") (V2DF "TARGET_SSE2")])