From: Shriya Sharma Date: Tue, 26 Sep 2023 10:32:45 +0000 (+0100) Subject: Added english language description, spaces and brackets for lwzu instruction X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=aa203af4e36e76a2238f1f073a34087ab1dfbffb;p=openpower-isa.git Added english language description, spaces and brackets for lwzu instruction --- diff --git a/openpower/isa/fixedload.mdwn b/openpower/isa/fixedload.mdwn index f2339b89..502e29c2 100644 --- a/openpower/isa/fixedload.mdwn +++ b/openpower/isa/fixedload.mdwn @@ -373,6 +373,16 @@ Pseudo-code: RT <- [0]*32 || MEM(EA, 4) RA <- EA +Description: + + Let the effective address (EA) be the sum (RA)+ D. The + word in storage addressed by EA is loaded into + RT[32:63]. RT[0:31] are set to 0. + + EA is placed into register RA. + + If RA=0 or RA=RT, the instruction form is invalid. + Special Registers Altered: None