From: Jim Blandy Date: Sat, 16 Jul 2005 18:43:55 +0000 (+0000) Subject: * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET, X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=aa2608541f408a36e7298410dd29b7cbfd072a5e;p=binutils-gdb.git * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET, to represent isa sets. --- diff --git a/cpu/ChangeLog b/cpu/ChangeLog index ec5f52b74fb..4d2860f043d 100644 --- a/cpu/ChangeLog +++ b/cpu/ChangeLog @@ -1,3 +1,8 @@ +2005-07-16 Jim Blandy + + * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET, + to represent isa sets. + 2005-07-15 Jim Blandy * m32c.cpu, m32c.opc: Fix copyright. diff --git a/cpu/m32c.opc b/cpu/m32c.opc index 04baa9c5ebf..3824118ddce 100644 --- a/cpu/m32c.opc +++ b/cpu/m32c.opc @@ -866,14 +866,14 @@ m32c_cgen_insn_supported (CGEN_CPU_DESC cd, const CGEN_INSN *insn) { int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH); - CGEN_BITSET isas = CGEN_INSN_BITSET_ATTR_VALUE (insn, CGEN_INSN_ISA); + int isas = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_ISA); /* If attributes are absent, assume no restriction. */ if (machs == 0) machs = ~0; - return (machs & cd->machs) - && cgen_bitset_intersect_p (& isas, cd->isas); + return ((machs & cd->machs) + && (isas & cd->isas)); } /* Parse a set of registers, R0,R1,A0,A1,SB,FB. */