From: Ilia Mirkin Date: Sat, 27 Feb 2016 20:30:34 +0000 (-0500) Subject: nv50,nvc0: bump minimum texture buffer offset alignment X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=aa3b85fd18d32a49f2e0051ef434d6c16d4a5d18;p=mesa.git nv50,nvc0: bump minimum texture buffer offset alignment It appears that it actually needs to be aligned to the datum size, so it was 1 when testing with R8, but it can be as high as 16 with RGBA32. Signed-off-by: Ilia Mirkin Cc: "11.1 11.2" --- diff --git a/src/gallium/drivers/nouveau/nv50/nv50_screen.c b/src/gallium/drivers/nouveau/nv50/nv50_screen.c index 8d11dd7bf21..0bd5de91d1f 100644 --- a/src/gallium/drivers/nouveau/nv50/nv50_screen.c +++ b/src/gallium/drivers/nouveau/nv50/nv50_screen.c @@ -121,7 +121,7 @@ nv50_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT: return 256; case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT: - return 1; /* 256 for binding as RT, but that's not possible in GL */ + return 16; /* 256 for binding as RT, but that's not possible in GL */ case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT: return NOUVEAU_MIN_BUFFER_MAP_ALIGN; case PIPE_CAP_MAX_VIEWPORTS: diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c index 998e9ea47ef..37620ea8ba6 100644 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c @@ -112,7 +112,7 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT: return 256; case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT: - return 1; /* 256 for binding as RT, but that's not possible in GL */ + return 16; /* 256 for binding as RT, but that's not possible in GL */ case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT: return 16; case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT: