From: Ulrich Weigand <uweigand@de.ibm.com>
Date: Wed, 18 Jun 2008 20:32:04 +0000 (+0000)
Subject: spu.c (reg_align): Remove.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=aa5d99391813f31c6ded568a345701fc935f2d83;p=gcc.git

spu.c (reg_align): Remove.

	* config/spu/spu.c (reg_align): Remove.
	(regno_aligned_for_load): Also accept ARG_POINTER_REGNUM.
	(spu_split_load): Use regno_aligned_for_load instead of reg_align.
	(spu_split_store): Likewise.

From-SVN: r136910
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 5e159468dee..60d20073918 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2008-06-18  Ulrich Weigand  <Ulrich.Weigand@de.ibm.com>
+
+	* config/spu/spu.c (reg_align): Remove.
+	(regno_aligned_for_load): Also accept ARG_POINTER_REGNUM.
+	(spu_split_load): Use regno_aligned_for_load instead of reg_align.
+	(spu_split_store): Likewise.
+
 2006-06-18  Bernhard Fischer  <aldot@gcc.gnu.org>
 
 	* gcc/tree-vn.c: Fix typo in comment.
diff --git a/gcc/config/spu/spu.c b/gcc/config/spu/spu.c
index 3fb339d0324..4347d59d810 100644
--- a/gcc/config/spu/spu.c
+++ b/gcc/config/spu/spu.c
@@ -122,7 +122,6 @@ static tree spu_gimplify_va_arg_expr (tree valist, tree type, tree * pre_p,
 				      tree * post_p);
 static int regno_aligned_for_load (int regno);
 static int store_with_one_insn_p (rtx mem);
-static int reg_align (rtx reg);
 static int mem_is_padded_component_ref (rtx x);
 static bool spu_assemble_integer (rtx x, unsigned int size, int aligned_p);
 static void spu_asm_globalize_label (FILE * file, const char *name);
@@ -3382,6 +3381,7 @@ regno_aligned_for_load (int regno)
 {
   return regno == FRAME_POINTER_REGNUM
     || (frame_pointer_needed && regno == HARD_FRAME_POINTER_REGNUM)
+    || regno == ARG_POINTER_REGNUM
     || regno == STACK_POINTER_REGNUM
     || (regno >= FIRST_VIRTUAL_REGISTER 
 	&& regno <= LAST_VIRTUAL_REGISTER);
@@ -3558,18 +3558,6 @@ spu_expand_mov (rtx * ops, enum machine_mode mode)
   return 0;
 }
 
-static int
-reg_align (rtx reg)
-{
-  /* For now, only frame registers are known to be aligned at all times.
-     We can't trust REGNO_POINTER_ALIGN because optimization will move
-     registers around, potentially changing an "aligned" register in an
-     address to an unaligned register, which would result in an invalid
-     address. */
-  int regno = REGNO (reg);
-  return REGNO_PTR_FRAME_P (regno) ? REGNO_POINTER_ALIGN (regno) : 1;
-}
-
 void
 spu_split_load (rtx * ops)
 {
@@ -3595,9 +3583,9 @@ spu_split_load (rtx * ops)
        */
       p0 = XEXP (addr, 0);
       p1 = XEXP (addr, 1);
-      if (reg_align (p0) < 128)
+      if (REG_P (p0) && !regno_aligned_for_load (REGNO (p0)))
 	{
-	  if (GET_CODE (p1) == REG && reg_align (p1) < 128)
+	  if (REG_P (p1) && !regno_aligned_for_load (REGNO (p1)))
 	    {
 	      emit_insn (gen_addsi3 (ops[3], p0, p1));
 	      rot = ops[3];
@@ -3613,13 +3601,13 @@ spu_split_load (rtx * ops)
 	      p1 = GEN_INT (INTVAL (p1) & -16);
 	      addr = gen_rtx_PLUS (SImode, p0, p1);
 	    }
-	  else if (GET_CODE (p1) == REG && reg_align (p1) < 128)
+	  else if (REG_P (p1) && !regno_aligned_for_load (REGNO (p1)))
 	    rot = p1;
 	}
     }
   else if (GET_CODE (addr) == REG)
     {
-      if (reg_align (addr) < 128)
+      if (!regno_aligned_for_load (REGNO (addr)))
 	rot = addr;
     }
   else if (GET_CODE (addr) == CONST)
@@ -3764,7 +3752,7 @@ spu_split_store (rtx * ops)
       set_mem_alias_set (lmem, 0);
       emit_insn (gen_movti (reg, lmem));
 
-      if (!p0 || reg_align (p0) >= 128)
+      if (!p0 || regno_aligned_for_load (REGNO (p0)))
 	p0 = stack_pointer_rtx;
       if (!p1_lo)
 	p1_lo = const0_rtx;