From: Florent Kermarrec <florent@enjoy-digital.fr>
Date: Mon, 11 Feb 2019 08:23:39 +0000 (+0100)
Subject: soc_sdram: don't generate sdram initialization error message when integrated_main_ram... 
X-Git-Tag: 24jan2021_ls180~1396
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=aabf042d383cf923224be12ede689052eae5da79;p=litex.git

soc_sdram: don't generate sdram initialization error message when integrated_main_ram is used
---

diff --git a/litex/soc/integration/soc_sdram.py b/litex/soc/integration/soc_sdram.py
index 5a80256d..4e819139 100644
--- a/litex/soc/integration/soc_sdram.py
+++ b/litex/soc/integration/soc_sdram.py
@@ -41,8 +41,9 @@ class SoCSDRAM(SoCCore):
 
     def __init__(self, platform, clk_freq, l2_size=8192, **kwargs):
         SoCCore.__init__(self, platform, clk_freq, **kwargs)
-        if self.cpu_type is not None and self.csr_data_width != 8:
-             raise NotImplementedError("BIOS supports SDRAM initialization only for csr_data_width=8")
+        if not self.integrated_main_ram_size:
+            if self.cpu_type is not None and self.csr_data_width != 8:
+                 raise NotImplementedError("BIOS supports SDRAM initialization only for csr_data_width=8")
         self.l2_size = l2_size
 
         self._sdram_phy = []