From: bugzilla-daemon Date: Fri, 27 Mar 2020 10:44:30 +0000 (+0000) Subject: [libre-riscv-dev] [Bug 268] nmigen does not seem to support write-through SRAM X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=aaea6c43e7b91086e5152e51295dee07cb08b1eb;p=libre-riscv-dev.git [libre-riscv-dev] [Bug 268] nmigen does not seem to support write-through SRAM --- diff --git a/5e/97f21cc8b3d1c36a25307beeb1798e34ca825d b/5e/97f21cc8b3d1c36a25307beeb1798e34ca825d new file mode 100644 index 0000000..5cf8240 --- /dev/null +++ b/5e/97f21cc8b3d1c36a25307beeb1798e34ca825d @@ -0,0 +1,73 @@ +Return-path: +Envelope-to: publicinbox@libre-riscv.org +Delivery-date: Fri, 27 Mar 2020 10:44:32 +0000 +Received: from localhost ([::1] helo=libre-riscv.org) + by libre-riscv.org with esmtp (Exim 4.89) + (envelope-from ) + id 1jHmTY-0003pe-01; Fri, 27 Mar 2020 10:44:31 +0000 +Received: from localhost ([127.0.0.1] helo=bugs.libre-riscv.org) + by libre-riscv.org with esmtp (Exim 4.89) + (envelope-from ) id 1jHmTW-0003pW-4R + for libre-riscv-dev@lists.libre-riscv.org; Fri, 27 Mar 2020 10:44:30 +0000 +From: bugzilla-daemon@libre-riscv.org +To: libre-riscv-dev@lists.libre-riscv.org +Date: Fri, 27 Mar 2020 10:44:30 +0000 +X-Bugzilla-Reason: CC +X-Bugzilla-Type: changed +X-Bugzilla-Watch-Reason: None +X-Bugzilla-Product: Libre-SOC's first SoC +X-Bugzilla-Component: Source Code +X-Bugzilla-Version: unspecified +X-Bugzilla-Keywords: +X-Bugzilla-Severity: enhancement +X-Bugzilla-Who: staf@fibraservi.eu +X-Bugzilla-Status: CONFIRMED +X-Bugzilla-Resolution: +X-Bugzilla-Priority: --- +X-Bugzilla-Assigned-To: lkcl@lkcl.net +X-Bugzilla-Flags: +X-Bugzilla-Changed-Fields: cc +Message-ID: +In-Reply-To: +References: +X-Bugzilla-URL: http://bugs.libre-riscv.org/ +Auto-Submitted: auto-generated +MIME-Version: 1.0 +Subject: [libre-riscv-dev] [Bug 268] nmigen does not seem to support + write-through SRAM +X-BeenThere: libre-riscv-dev@lists.libre-riscv.org +X-Mailman-Version: 2.1.23 +Precedence: list +List-Id: Libre-RISCV General Development + +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Reply-To: Libre-RISCV General Development + +Content-Type: text/plain; charset="utf-8" +Content-Transfer-Encoding: base64 +Errors-To: libre-riscv-dev-bounces@lists.libre-riscv.org +Sender: "libre-riscv-dev" + +aHR0cDovL2J1Z3MubGlicmUtcmlzY3Yub3JnL3Nob3dfYnVnLmNnaT9pZD0yNjgKClN0YWYgVmVy +aGFlZ2VuIDxzdGFmQGZpYnJhc2VydmkuZXU+IGNoYW5nZWQ6CgogICAgICAgICAgIFdoYXQgICAg +fFJlbW92ZWQgICAgICAgICAgICAgICAgICAgICB8QWRkZWQKLS0tLS0tLS0tLS0tLS0tLS0tLS0t +LS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLQog +ICAgICAgICAgICAgICAgIENDfCAgICAgICAgICAgICAgICAgICAgICAgICAgICB8c3RhZkBmaWJy +YXNlcnZpLmV1CgotLS0gQ29tbWVudCAjMSBmcm9tIFN0YWYgVmVyaGFlZ2VuIDxzdGFmQGZpYnJh +c2VydmkuZXU+IC0tLQpJIG1heSBoYXZlIG92ZXJsb29rZWQgc29tZXRoaW5nIGFuZCB3cml0ZS10 +aHJvdWdoIG1heSBhY3R1YWxseSBiZSBpbXBsZW1lbnRlZC4KSSB0aGluayB0aGUgdHJpY2sgaXMg +dG8gaGF2ZSBib3RoIGEgcmVhZCBhbmQgYSB3cml0ZSBwb3J0OyBoYXZlIHRoZXNlIHBvcnQKc2hh +cmUgdGhlIHNhbWUgYWRkcmVzcyBzaWduYWwgYW5kIGFsc28gZG8gYSByZWFkIHdoZW4geW91IGRv +IGEgd3JpdGUgKGUuZy4gaGF2ZQp0cmFuc3BhcmVudCByZWFkIHBvcnQgd2hpY2ggbWFrZSB0aGUg +cmVhZCBwb3J0IGFsd2F5cyBlbmFibGVkKS4KCi0tIApZb3UgYXJlIHJlY2VpdmluZyB0aGlzIG1h +aWwgYmVjYXVzZToKWW91IGFyZSBvbiB0aGUgQ0MgbGlzdCBmb3IgdGhlIGJ1Zy4KX19fX19fX19f +X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KbGlicmUtcmlzY3YtZGV2IG1h +aWxpbmcgbGlzdApsaWJyZS1yaXNjdi1kZXZAbGlzdHMubGlicmUtcmlzY3Yub3JnCmh0dHA6Ly9s +aXN0cy5saWJyZS1yaXNjdi5vcmcvbWFpbG1hbi9saXN0aW5mby9saWJyZS1yaXNjdi1kZXYK +