From: Oleg Endo Date: Fri, 6 Apr 2012 12:25:03 +0000 (+0000) Subject: sh-protos.h (fp_zero_operand, [...]): Use bool as return type. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=aaf701c5e19cc94f0f6362058fac7bd80a8ab58b;p=gcc.git sh-protos.h (fp_zero_operand, [...]): Use bool as return type. * config/sh/sh-protos.h (fp_zero_operand, fp_one_operand, nonpic_symbol_mentioned_p, expand_block_move, expand_ashiftrt, sh_dynamicalize_shift_p, gen_shl_and, gen_shl_sext, system_reg_operand, reg_unused_after, sh_can_redirect_branch, sh_need_epilogue, fldi_ok, sh_hard_regno_rename_ok, sh_cfun_interrupt_handler_p, sh_cfun_resbank_handler_p, sh_attr_renesas_p, sh_cfun_attr_renesas_p, check_use_sfunc_addr, sh_contains_memref_p, sh_loads_bankedreg_p, sh2a_is_function_vector_call): Use bool as return type. (sh_pass_in_reg_p): Remove. * config/sh/sh.c (broken_move, mova_p, noncall_uses_reg, high_pressure, flow_dependent_p, sh2a_function_vector_p, expand_block_move, expand_ashiftrt, sh_dynamicalize_shift_p, gen_shl_and, gen_shl_sext, sh_need_epilogue, sh2a_is_function_vector_call, sh_attr_renesas_p, sh_cfun_attr_renesas_p, sh_cfun_interrupt_handler_p, sh_cfun_resbank_handler_p, system_reg_operand, fp_zero_operand, fp_one_operand, fldi_ok, reg_unused_after, sh_can_redirect_branch, sh_hard_regno_rename_ok, check_use_sfunc_addr, sh_contains_memref_p, sh_loads_bankedreg_p): Use bool as return type. (nonpic_symbol_mentioned_p): Use bool as return type. Remove 'register' modifier. From-SVN: r186183 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 6fa1aa0c306..78faf467433 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,26 @@ +2012-04-06 Oleg Endo + + * config/sh/sh-protos.h (fp_zero_operand, fp_one_operand, + nonpic_symbol_mentioned_p, expand_block_move, expand_ashiftrt, + sh_dynamicalize_shift_p, gen_shl_and, gen_shl_sext, system_reg_operand, + reg_unused_after, sh_can_redirect_branch, sh_need_epilogue, fldi_ok, + sh_hard_regno_rename_ok, sh_cfun_interrupt_handler_p, + sh_cfun_resbank_handler_p, sh_attr_renesas_p, sh_cfun_attr_renesas_p, + check_use_sfunc_addr, sh_contains_memref_p, sh_loads_bankedreg_p, + sh2a_is_function_vector_call): Use bool as return type. + (sh_pass_in_reg_p): Remove. + * config/sh/sh.c (broken_move, mova_p, noncall_uses_reg, high_pressure, + flow_dependent_p, sh2a_function_vector_p, expand_block_move, + expand_ashiftrt, sh_dynamicalize_shift_p, gen_shl_and, gen_shl_sext, + sh_need_epilogue, sh2a_is_function_vector_call, sh_attr_renesas_p, + sh_cfun_attr_renesas_p, sh_cfun_interrupt_handler_p, + sh_cfun_resbank_handler_p, system_reg_operand, fp_zero_operand, + fp_one_operand, fldi_ok, reg_unused_after, sh_can_redirect_branch, + sh_hard_regno_rename_ok, check_use_sfunc_addr, sh_contains_memref_p, + sh_loads_bankedreg_p): Use bool as return type. + (nonpic_symbol_mentioned_p): Use bool as return type. Remove + 'register' modifier. + 2012-04-06 Matt Turner * doc/install.texi: Correct typo "-mno-lsc" -> "-mno-llsc". diff --git a/gcc/config/sh/sh-protos.h b/gcc/config/sh/sh-protos.h index 386188bb99f..337d80d82ce 100644 --- a/gcc/config/sh/sh-protos.h +++ b/gcc/config/sh/sh-protos.h @@ -53,18 +53,18 @@ extern const char *output_far_jump (rtx, rtx); extern rtx sfunc_uses_reg (rtx); extern int barrier_align (rtx); extern int sh_loop_align (rtx); -extern int fp_zero_operand (rtx); -extern int fp_one_operand (rtx); +extern bool fp_zero_operand (rtx); +extern bool fp_one_operand (rtx); extern int fp_int_operand (rtx); extern rtx get_fpscr_rtx (void); extern bool sh_legitimate_index_p (enum machine_mode, rtx); extern bool sh_legitimize_reload_address (rtx *, enum machine_mode, int, int); extern rtx legitimize_pic_address (rtx, enum machine_mode, rtx); -extern int nonpic_symbol_mentioned_p (rtx); +extern bool nonpic_symbol_mentioned_p (rtx); extern void emit_sf_insn (rtx); extern void emit_df_insn (rtx); extern void output_pic_addr_const (FILE *, rtx); -extern int expand_block_move (rtx *); +extern bool expand_block_move (rtx *); extern int prepare_move_operands (rtx[], enum machine_mode mode); extern enum rtx_code prepare_cbranch_operands (rtx *, enum machine_mode mode, enum rtx_code comparison); @@ -79,15 +79,15 @@ extern void gen_ashift (int, int, rtx); extern void gen_ashift_hi (int, int, rtx); extern void gen_shifty_op (int, rtx *); extern void gen_shifty_hi_op (int, rtx *); -extern int expand_ashiftrt (rtx *); -extern int sh_dynamicalize_shift_p (rtx); +extern bool expand_ashiftrt (rtx *); +extern bool sh_dynamicalize_shift_p (rtx); extern int shl_and_kind (rtx, rtx, int *); extern int shl_and_length (rtx); extern int shl_and_scr_length (rtx); -extern int gen_shl_and (rtx, rtx, rtx, rtx); +extern bool gen_shl_and (rtx, rtx, rtx, rtx); extern int shl_sext_kind (rtx, rtx, int *); extern int shl_sext_length (rtx); -extern int gen_shl_sext (rtx, rtx, rtx, rtx); +extern bool gen_shl_sext (rtx, rtx, rtx, rtx); extern rtx gen_datalabel_ref (rtx); extern int regs_used (rtx, int); extern void fixup_addr_diff_vecs (rtx); @@ -95,7 +95,7 @@ extern int get_dest_uid (rtx, int); extern void final_prescan_insn (rtx, rtx *, int); extern int symbol_ref_operand (rtx, enum machine_mode); extern enum tls_model tls_symbolic_operand (rtx, enum machine_mode); -extern int system_reg_operand (rtx, enum machine_mode); +extern bool system_reg_operand (rtx, enum machine_mode); extern int general_movsrc_operand (rtx, enum machine_mode); extern int general_movdst_operand (rtx, enum machine_mode); extern int arith_reg_operand (rtx, enum machine_mode); @@ -107,14 +107,14 @@ extern int fpscr_operand (rtx, enum machine_mode); extern int fpul_operand (rtx, enum machine_mode); extern int commutative_float_operator (rtx, enum machine_mode); extern int noncommutative_float_operator (rtx, enum machine_mode); -extern int reg_unused_after (rtx, rtx); +extern bool reg_unused_after (rtx, rtx); extern void expand_sf_unop (rtx (*)(rtx, rtx, rtx), rtx *); extern void expand_sf_binop (rtx (*)(rtx, rtx, rtx, rtx), rtx *); extern void expand_df_unop (rtx (*)(rtx, rtx, rtx), rtx *); extern void expand_df_binop (rtx (*)(rtx, rtx, rtx, rtx), rtx *); extern void expand_fp_branch (rtx (*)(void), rtx (*)(void)); extern int sh_insn_length_adjustment (rtx); -extern int sh_can_redirect_branch (rtx, rtx); +extern bool sh_can_redirect_branch (rtx, rtx); extern void sh_expand_unop_v2sf (enum rtx_code, rtx, rtx); extern void sh_expand_binop_v2sf (enum rtx_code, rtx, rtx, rtx); extern int sh_expand_t_scc (rtx *); @@ -128,20 +128,20 @@ extern rtx get_fpscr_rtx (void); extern int sh_media_register_for_return (void); extern void sh_expand_prologue (void); extern void sh_expand_epilogue (bool); -extern int sh_need_epilogue (void); +extern bool sh_need_epilogue (void); extern void sh_set_return_address (rtx, rtx); extern int initial_elimination_offset (int, int); -extern int fldi_ok (void); -extern int sh_hard_regno_rename_ok (unsigned int, unsigned int); -extern int sh_cfun_interrupt_handler_p (void); -extern int sh_cfun_resbank_handler_p (void); -extern int sh_attr_renesas_p (const_tree); -extern int sh_cfun_attr_renesas_p (void); +extern bool fldi_ok (void); +extern bool sh_hard_regno_rename_ok (unsigned int, unsigned int); +extern bool sh_cfun_interrupt_handler_p (void); +extern bool sh_cfun_resbank_handler_p (void); +extern bool sh_attr_renesas_p (const_tree); +extern bool sh_cfun_attr_renesas_p (void); extern bool sh_cannot_change_mode_class (enum machine_mode, enum machine_mode, enum reg_class); extern bool sh_small_register_classes_for_mode_p (enum machine_mode); extern void sh_mark_label (rtx, int); -extern int check_use_sfunc_addr (rtx, rtx); +extern bool check_use_sfunc_addr (rtx, rtx); #ifdef HARD_CONST extern void fpscr_set_from_mem (int, HARD_REG_SET); @@ -153,18 +153,17 @@ extern void sh_pr_nosave_low_regs (struct cpp_reader *); extern rtx function_symbol (rtx, const char *, enum sh_function_kind); extern rtx sh_get_pr_initial_val (void); -extern int sh_pass_in_reg_p (CUMULATIVE_ARGS *, enum machine_mode, tree); extern void sh_init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree, signed int, enum machine_mode); extern rtx sh_dwarf_register_span (rtx); extern rtx replace_n_hard_rtx (rtx, rtx *, int , int); extern int shmedia_cleanup_truncate (rtx *, void *); -extern int sh_contains_memref_p (rtx); -extern int sh_loads_bankedreg_p (rtx); +extern bool sh_contains_memref_p (rtx); +extern bool sh_loads_bankedreg_p (rtx); extern rtx shmedia_prepare_call_address (rtx fnaddr, int is_sibcall); extern int sh2a_get_function_vector_number (rtx); -extern int sh2a_is_function_vector_call (rtx); +extern bool sh2a_is_function_vector_call (rtx); extern void sh_fix_range (const char *); extern bool sh_hard_regno_mode_ok (unsigned int, enum machine_mode); #endif /* ! GCC_SH_PROTOS_H */ diff --git a/gcc/config/sh/sh.c b/gcc/config/sh/sh.c index d81bcebf1e0..d7c4c61699c 100644 --- a/gcc/config/sh/sh.c +++ b/gcc/config/sh/sh.c @@ -175,10 +175,10 @@ static void print_slot (rtx); static rtx add_constant (rtx, enum machine_mode, rtx); static void dump_table (rtx, rtx); static int hi_const (rtx); -static int broken_move (rtx); -static int mova_p (rtx); +static bool broken_move (rtx); +static bool mova_p (rtx); static rtx find_barrier (int, rtx, rtx); -static int noncall_uses_reg (rtx, rtx, rtx *); +static bool noncall_uses_reg (rtx, rtx, rtx *); static rtx gen_block_redirect (rtx, int, int); static void sh_reorg (void); static void sh_option_override (void); @@ -219,7 +219,7 @@ static void sh_md_finish_global (FILE *, int); static int rank_for_reorder (const void *, const void *); static void swap_reorder (rtx *, int); static void ready_reorder (rtx *, int); -static short high_pressure (enum machine_mode); +static bool high_pressure (enum machine_mode); static int sh_reorder (FILE *, int, rtx *, int *, int); static int sh_reorder2 (FILE *, int, rtx *, int *, int); static void sh_md_init (FILE *, int, int); @@ -239,7 +239,7 @@ static tree sh_media_builtin_decl (unsigned, bool); static rtx sh_expand_builtin (tree, rtx, rtx, enum machine_mode, int); static void sh_output_mi_thunk (FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree); static void sh_file_start (void); -static int flow_dependent_p (rtx, rtx); +static bool flow_dependent_p (rtx, rtx); static void flow_dependent_p_1 (rtx, const_rtx, void *); static int shiftcosts (rtx); static int and_xor_ior_costs (rtx, int); @@ -297,7 +297,7 @@ static rtx sh_function_arg (cumulative_args_t, enum machine_mode, static bool sh_scalar_mode_supported_p (enum machine_mode); static int sh_dwarf_calling_convention (const_tree); static void sh_encode_section_info (tree, rtx, int); -static int sh2a_function_vector_p (tree); +static bool sh2a_function_vector_p (tree); static void sh_trampoline_init (rtx, tree, rtx); static rtx sh_trampoline_adjust_address (rtx); static void sh_conditional_register_usage (void); @@ -1463,7 +1463,7 @@ force_into (rtx value, rtx target) OPERANDS[2] is the size. OPERANDS[3] is the alignment safe to use. */ -int +bool expand_block_move (rtx *operands) { int align = INTVAL (operands[3]); @@ -1471,7 +1471,7 @@ expand_block_move (rtx *operands) int bytes = (constp ? INTVAL (operands[2]) : 0); if (! constp) - return 0; + return false; /* If we could use mov.l to move words and dest is word-aligned, we can use movua.l for loads and still generate a relatively short @@ -1508,18 +1508,18 @@ expand_block_move (rtx *operands) src_addr, copied), bytes - copied, align, 0); - return 1; + return true; } /* If it isn't a constant number of bytes, or if it doesn't have 4 byte alignment, or if it isn't a multiple of 4 bytes, then fail. */ if (align < 4 || (bytes % 4 != 0)) - return 0; + return false; if (TARGET_HARD_SH4) { if (bytes < 12) - return 0; + return false; else if (bytes == 12) { rtx func_addr_rtx = gen_reg_rtx (Pmode); @@ -1530,7 +1530,7 @@ expand_block_move (rtx *operands) force_into (XEXP (operands[0], 0), r4); force_into (XEXP (operands[1], 0), r5); emit_insn (gen_block_move_real_i4 (func_addr_rtx)); - return 1; + return true; } else if (! optimize_size) { @@ -1549,10 +1549,10 @@ expand_block_move (rtx *operands) dwords = bytes >> 3; emit_insn (gen_move_insn (r6, GEN_INT (dwords - 1))); emit_insn (gen_block_lump_real_i4 (func_addr_rtx)); - return 1; + return true; } else - return 0; + return false; } if (bytes < 64) { @@ -1566,7 +1566,7 @@ expand_block_move (rtx *operands) force_into (XEXP (operands[0], 0), r4); force_into (XEXP (operands[1], 0), r5); emit_insn (gen_block_move_real (func_addr_rtx)); - return 1; + return true; } /* This is the same number of bytes as a memcpy call, but to a different @@ -1593,10 +1593,10 @@ expand_block_move (rtx *operands) while_loop = ((bytes / 4) / 16 - 1) * 16; emit_insn (gen_move_insn (r6, GEN_INT (while_loop + final_switch))); emit_insn (gen_block_lump_real (func_addr_rtx)); - return 1; + return true; } - return 0; + return false; } /* Prepare operands for a move define_expand; specifically, one of the @@ -3386,7 +3386,7 @@ gen_shifty_hi_op (int code, rtx *operands) /* ??? Rewrite to use super-optimizer sequences. */ -int +bool expand_ashiftrt (rtx *operands) { rtx wrk; @@ -3400,7 +3400,7 @@ expand_ashiftrt (rtx *operands) rtx count = copy_to_mode_reg (SImode, operands[2]); emit_insn (gen_negsi2 (count, count)); emit_insn (gen_ashrsi3_d (operands[0], operands[1], count)); - return 1; + return true; } else if (ashiftrt_insns[INTVAL (operands[2]) & 31] > 1 + SH_DYNAMIC_SHIFT_COST) @@ -3408,11 +3408,11 @@ expand_ashiftrt (rtx *operands) rtx count = force_reg (SImode, GEN_INT (- (INTVAL (operands[2]) & 31))); emit_insn (gen_ashrsi3_d (operands[0], operands[1], count)); - return 1; + return true; } } if (!CONST_INT_P (operands[2])) - return 0; + return false; value = INTVAL (operands[2]) & 31; @@ -3426,10 +3426,10 @@ expand_ashiftrt (rtx *operands) emit_insn (gen_cmpgtsi_t (force_reg (SImode, CONST0_RTX (SImode)), operands[1])); emit_insn (gen_mov_neg_si_t (operands[0])); - return 1; + return true; } emit_insn (gen_ashrsi2_31 (operands[0], operands[1])); - return 1; + return true; } else if (value >= 16 && value <= 19) { @@ -3439,7 +3439,7 @@ expand_ashiftrt (rtx *operands) while (value--) gen_ashift (ASHIFTRT, 1, wrk); emit_move_insn (operands[0], wrk); - return 1; + return true; } /* Expand a short sequence inline, longer call a magic routine. */ else if (value <= 5) @@ -3449,7 +3449,7 @@ expand_ashiftrt (rtx *operands) while (value--) gen_ashift (ASHIFTRT, 1, wrk); emit_move_insn (operands[0], wrk); - return 1; + return true; } wrk = gen_reg_rtx (Pmode); @@ -3460,10 +3460,10 @@ expand_ashiftrt (rtx *operands) function_symbol (wrk, func, SFUNC_STATIC); emit_insn (gen_ashrsi3_n (GEN_INT (value), wrk)); emit_move_insn (operands[0], gen_rtx_REG (SImode, 4)); - return 1; + return true; } -int +bool sh_dynamicalize_shift_p (rtx count) { return shift_insns[INTVAL (count) & 31] > 1 + SH_DYNAMIC_SHIFT_COST; @@ -3636,7 +3636,7 @@ shl_and_scr_length (rtx insn) /* Generate rtl for instructions for which shl_and_kind advised a particular method of generating them, i.e. returned zero. */ -int +bool gen_shl_and (rtx dest, rtx left_rtx, rtx mask_rtx, rtx source) { int attributes[3]; @@ -3651,7 +3651,7 @@ gen_shl_and (rtx dest, rtx left_rtx, rtx mask_rtx, rtx source) switch (kind) { default: - return -1; + return true; case 1: { int first = attributes[2]; @@ -3746,7 +3746,7 @@ gen_shl_and (rtx dest, rtx left_rtx, rtx mask_rtx, rtx source) break; } } - return 0; + return false; } /* Try to find a good way to implement the combiner pattern @@ -3875,7 +3875,7 @@ shl_sext_length (rtx insn) /* Generate rtl for this pattern */ -int +bool gen_shl_sext (rtx dest, rtx left_rtx, rtx size_rtx, rtx source) { int kind; @@ -3989,9 +3989,9 @@ gen_shl_sext (rtx dest, rtx left_rtx, rtx size_rtx, rtx source) emit_insn (gen_ashrsi3_k (dest, dest, const1_rtx)); break; default: - return -1; + return true; } - return 0; + return false; } /* Prefix a symbol_ref name with "datalabel". */ @@ -4396,7 +4396,7 @@ hi_const (rtx src) CONST_DOUBLE input value is CONST_OK_FOR_I08. For a SFmode move, we don't need to fix it if the input value is CONST_OK_FOR_I08. */ -static int +static bool broken_move (rtx insn) { if (NONJUMP_INSN_P (insn)) @@ -4433,13 +4433,13 @@ broken_move (rtx insn) && (satisfies_constraint_I20 (SET_SRC (pat)) || satisfies_constraint_I28 (SET_SRC (pat)))) && ! satisfies_constraint_I08 (SET_SRC (pat))) - return 1; + return true; } - return 0; + return false; } -static int +static bool mova_p (rtx insn) { return (NONJUMP_INSN_P (insn) @@ -4921,7 +4921,7 @@ sfunc_uses_reg (rtx insn) setting it while calling it. Set *SET to a SET rtx if the register is set by INSN. */ -static int +static bool noncall_uses_reg (rtx reg, rtx insn, rtx *set) { rtx pattern, reg2; @@ -4936,7 +4936,7 @@ noncall_uses_reg (rtx reg, rtx insn, rtx *set) && REG_P (SET_DEST (pattern)) && REGNO (reg) == REGNO (SET_DEST (pattern))) *set = pattern; - return 0; + return false; } if (!CALL_P (insn)) { @@ -4957,12 +4957,12 @@ noncall_uses_reg (rtx reg, rtx insn, rtx *set) { part = XVECEXP (par, 0, i); if (GET_CODE (part) != SET && reg_mentioned_p (reg, part)) - return 1; + return true; } return reg_mentioned_p (reg, SET_SRC (pattern)); } - return 1; + return true; } pattern = PATTERN (insn); @@ -4973,7 +4973,7 @@ noncall_uses_reg (rtx reg, rtx insn, rtx *set) for (i = XVECLEN (pattern, 0) - 1; i >= 1; i--) if (reg_mentioned_p (reg, XVECEXP (pattern, 0, i))) - return 1; + return true; pattern = XVECEXP (pattern, 0, 0); } @@ -4985,7 +4985,7 @@ noncall_uses_reg (rtx reg, rtx insn, rtx *set) mode is different. */ if (!REG_P (SET_DEST (pattern)) || REGNO (reg) != REGNO (SET_DEST (pattern))) - return 1; + return true; *set = pattern; } @@ -4996,9 +4996,9 @@ noncall_uses_reg (rtx reg, rtx insn, rtx *set) if (GET_CODE (pattern) != CALL || !MEM_P (XEXP (pattern, 0)) || ! rtx_equal_p (reg, XEXP (XEXP (pattern, 0), 0))) - return 1; + return true; - return 0; + return false; } /* Given a X, a pattern of an insn or a part of it, return a mask of used @@ -7643,7 +7643,7 @@ sh_expand_epilogue (bool sibcall_p) static int sh_need_epilogue_known = 0; -int +bool sh_need_epilogue (void) { if (! sh_need_epilogue_known) @@ -8291,9 +8291,9 @@ static bool sh_promote_prototypes (const_tree type) { if (TARGET_HITACHI) - return 0; + return false; if (! type) - return 1; + return true; return ! sh_attr_renesas_p (type); } @@ -9088,9 +9088,9 @@ sh2a_handle_function_vector_handler_attribute (tree * node, tree name, return NULL_TREE; } -/* Returns 1 if current function has been assigned the attribute +/* Returns true if current function has been assigned the attribute 'function_vector'. */ -int +bool sh2a_is_function_vector_call (rtx x) { if (GET_CODE (x) == SYMBOL_REF @@ -9099,10 +9099,10 @@ sh2a_is_function_vector_call (rtx x) tree tr = SYMBOL_REF_DECL (x); if (sh2a_function_vector_p (tr)) - return 1; + return true; } - return 0; + return false; } /* Returns the function vector number, if the attribute @@ -9198,30 +9198,30 @@ sh_handle_renesas_attribute (tree *node ATTRIBUTE_UNUSED, } /* True if __attribute__((renesas)) or -mrenesas. */ -int +bool sh_attr_renesas_p (const_tree td) { if (TARGET_HITACHI) - return 1; + return true; if (td == 0) - return 0; + return false; if (DECL_P (td)) td = TREE_TYPE (td); if (td == error_mark_node) - return 0; + return false; return (lookup_attribute ("renesas", TYPE_ATTRIBUTES (td)) != NULL_TREE); } /* True if __attribute__((renesas)) or -mrenesas, for the current function. */ -int +bool sh_cfun_attr_renesas_p (void) { return sh_attr_renesas_p (current_function_decl); } -int +bool sh_cfun_interrupt_handler_p (void) { return (lookup_attribute ("interrupt_handler", @@ -9229,29 +9229,29 @@ sh_cfun_interrupt_handler_p (void) != NULL_TREE); } -/* Returns 1 if FUNC has been assigned the attribute +/* Returns true if FUNC has been assigned the attribute "function_vector". */ -int +bool sh2a_function_vector_p (tree func) { tree list; if (TREE_CODE (func) != FUNCTION_DECL) - return 0; + return false; list = SH_ATTRIBUTES (func); while (list) { if (is_attribute_p ("function_vector", TREE_PURPOSE (list))) - return 1; + return true; list = TREE_CHAIN (list); } - return 0; + return false; } /* Returns TRUE if given tree has the "resbank" attribute. */ -int +bool sh_cfun_resbank_handler_p (void) { return ((lookup_attribute ("resbank", @@ -9280,10 +9280,10 @@ sh_check_pch_target_flags (int old_flags) /* Predicates used by the templates. */ -/* Returns 1 if OP is MACL, MACH or PR. The input must be a REG rtx. +/* Returns true if OP is MACL, MACH or PR. The input must be a REG rtx. Used only in general_movsrc_operand. */ -int +bool system_reg_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED) { switch (REGNO (op)) @@ -9291,34 +9291,34 @@ system_reg_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED) case PR_REG: case MACL_REG: case MACH_REG: - return 1; + return true; } - return 0; + return false; } -/* Nonzero if OP is a floating point value with value 0.0. */ +/* Returns true if OP is a floating point value with value 0.0. */ -int +bool fp_zero_operand (rtx op) { REAL_VALUE_TYPE r; if (GET_MODE (op) != SFmode) - return 0; + return false; REAL_VALUE_FROM_CONST_DOUBLE (r, op); return REAL_VALUES_EQUAL (r, dconst0) && ! REAL_VALUE_MINUS_ZERO (r); } -/* Nonzero if OP is a floating point value with value 1.0. */ +/* Returns true if OP is a floating point value with value 1.0. */ -int +bool fp_one_operand (rtx op) { REAL_VALUE_TYPE r; if (GET_MODE (op) != SFmode) - return 0; + return false; REAL_VALUE_FROM_CONST_DOUBLE (r, op); return REAL_VALUES_EQUAL (r, dconst1); @@ -9331,10 +9331,10 @@ fp_one_operand (rtx op) interface to find that out during reload, so we must avoid choosing an fldi alternative during reload and thus failing to allocate a scratch register for the constant loading. */ -int +bool fldi_ok (void) { - return 1; + return true; } /* Return the TLS type for TLS symbols, 0 for otherwise. */ @@ -9364,7 +9364,7 @@ branch_dest (rtx branch) /* Return nonzero if REG is not used after INSN. We assume REG is a reload reg, and therefore does not live past labels. It may live past calls or jumps though. */ -int +bool reg_unused_after (rtx reg, rtx insn) { enum rtx_code code; @@ -9376,7 +9376,7 @@ reg_unused_after (rtx reg, rtx insn) set = single_set (insn); if (set && !MEM_P (SET_DEST (set)) && reg_overlap_mentioned_p (reg, SET_DEST (set))) - return 1; + return true; while ((insn = NEXT_INSN (insn))) { @@ -9397,7 +9397,7 @@ reg_unused_after (rtx reg, rtx insn) #endif if (code == JUMP_INSN) - return 0; + return false; /* If this is a sequence, we must handle them all at once. We could have for instance a call that sets the target register, @@ -9418,41 +9418,41 @@ reg_unused_after (rtx reg, rtx insn) else if (JUMP_P (this_insn)) { if (INSN_ANNULLED_BRANCH_P (this_insn)) - return 0; + return false; code = JUMP_INSN; } if (set && reg_overlap_mentioned_p (reg, SET_SRC (set))) - return 0; + return false; if (set && reg_overlap_mentioned_p (reg, SET_DEST (set))) { if (!MEM_P (SET_DEST (set))) - retval = 1; + retval = true; else - return 0; + return false; } if (set == 0 && reg_overlap_mentioned_p (reg, PATTERN (this_insn))) - return 0; + return false; } if (retval == 1) - return 1; + return true; else if (code == JUMP_INSN) - return 0; + return false; } set = single_set (insn); if (set && reg_overlap_mentioned_p (reg, SET_SRC (set))) - return 0; + return false; if (set && reg_overlap_mentioned_p (reg, SET_DEST (set))) return !MEM_P (SET_DEST (set)); if (set == 0 && reg_overlap_mentioned_p (reg, PATTERN (insn))) - return 0; + return false; if (code == CALL_INSN && call_really_used_regs[REGNO (reg)]) - return 1; + return true; } - return 1; + return true; } #include "ggc.h" @@ -9770,20 +9770,20 @@ sh_legitimate_address_p (enum machine_mode mode, rtx x, bool strict) /* Return TRUE if X references a SYMBOL_REF or LABEL_REF whose symbol isn't protected by a PIC unspec. */ -int +bool nonpic_symbol_mentioned_p (rtx x) { - register const char *fmt; - register int i; + const char *fmt; + int i; if (GET_CODE (x) == SYMBOL_REF || GET_CODE (x) == LABEL_REF || GET_CODE (x) == PC) - return 1; + return true; /* We don't want to look into the possible MEM location of a CONST_DOUBLE, since we're not going to use it, in general. */ if (GET_CODE (x) == CONST_DOUBLE) - return 0; + return false; if (GET_CODE (x) == UNSPEC && (XINT (x, 1) == UNSPEC_PIC @@ -9796,24 +9796,23 @@ nonpic_symbol_mentioned_p (rtx x) || XINT (x, 1) == UNSPEC_PLT || XINT (x, 1) == UNSPEC_SYMOFF || XINT (x, 1) == UNSPEC_PCREL_SYMOFF)) - return 0; + return false; fmt = GET_RTX_FORMAT (GET_CODE (x)); for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--) { if (fmt[i] == 'E') { - register int j; - + int j; for (j = XVECLEN (x, i) - 1; j >= 0; j--) if (nonpic_symbol_mentioned_p (XVECEXP (x, i, j))) - return 1; + return true; } else if (fmt[i] == 'e' && nonpic_symbol_mentioned_p (XEXP (x, i))) - return 1; + return true; } - return 0; + return false; } /* Convert a non-PIC address in `orig' to a PIC address using @GOT or @@ -10143,7 +10142,7 @@ mark_constant_pool_use (rtx x) /* Return true if it's possible to redirect BRANCH1 to the destination of an unconditional jump BRANCH2. We only want to do this if the resulting branch will have a short displacement. */ -int +bool sh_can_redirect_branch (rtx branch1, rtx branch2) { if (flag_expensive_optimizations && simplejump_p (branch2)) @@ -10157,7 +10156,7 @@ sh_can_redirect_branch (rtx branch1, rtx branch2) insn = PREV_INSN (insn)) { if (insn == dest) - return 1; + return true; else distance += get_attr_length (insn); } @@ -10166,16 +10165,16 @@ sh_can_redirect_branch (rtx branch1, rtx branch2) insn = NEXT_INSN (insn)) { if (insn == dest) - return 1; + return true; else distance += get_attr_length (insn); } } - return 0; + return false; } /* Return nonzero if register old_reg can be renamed to register new_reg. */ -int +bool sh_hard_regno_rename_ok (unsigned int old_reg ATTRIBUTE_UNUSED, unsigned int new_reg) { @@ -10184,9 +10183,9 @@ sh_hard_regno_rename_ok (unsigned int old_reg ATTRIBUTE_UNUSED, call-clobbered. */ if (sh_cfun_interrupt_handler_p () && !df_regs_ever_live_p (new_reg)) - return 0; + return false; - return 1; + return true; } /* Function to update the integer COST @@ -10397,7 +10396,7 @@ sh_adjust_cost (rtx insn, rtx link ATTRIBUTE_UNUSED, rtx dep_insn, int cost) /* Check if INSN is flow-dependent on DEP_INSN. Can also be used to check if DEP_INSN is anti-flow dependent on INSN. */ -static int +static bool flow_dependent_p (rtx insn, rtx dep_insn) { rtx tmp = PATTERN (insn); @@ -10734,13 +10733,13 @@ sh_md_init (FILE *dump ATTRIBUTE_UNUSED, #define SFMODE_MAX_WEIGHT 10 /* Return true if the pressure is high for MODE. */ -static short +static bool high_pressure (enum machine_mode mode) { /* Pressure on register r0 can lead to spill failures. so avoid sched1 for functions that already have high pressure on r0. */ if (r0_life_regions >= R0_MAX_LIFE_REGIONS) - return 1; + return true; if (mode == SFmode) return (CURR_REGMODE_PRESSURE (SFmode) > SFMODE_MAX_WEIGHT); @@ -12053,7 +12052,7 @@ extract_sfunc_addr (rtx insn) use_sfunc_addr. INSN is the use_sfunc_addr instruction, and REG is the register it guards. */ -int +bool check_use_sfunc_addr (rtx insn, rtx reg) { /* Search for the sfunc. It should really come right after INSN. */ @@ -12385,25 +12384,25 @@ sh_contains_memref_p_1 (rtx *loc, void *data ATTRIBUTE_UNUSED) return (MEM_P (*loc)); } -/* Return nonzero iff INSN contains a MEM. */ -int +/* Return true iff INSN contains a MEM. */ +bool sh_contains_memref_p (rtx insn) { return for_each_rtx (&PATTERN (insn), &sh_contains_memref_p_1, NULL); } -/* Return nonzero iff INSN loads a banked register. */ -int +/* Return true iff INSN loads a banked register. */ +bool sh_loads_bankedreg_p (rtx insn) { if (GET_CODE (PATTERN (insn)) == SET) { rtx op = SET_DEST (PATTERN(insn)); if (REG_P (op) && BANKED_REGISTER_P (REGNO (op))) - return 1; + return true; } - return 0; + return false; } /* FNADDR is the MEM expression from a call expander. Return an address