From: Eddie Hung <eddie@fpgeh.com>
Date: Sat, 13 Jul 2019 10:39:23 +0000 (-0700)
Subject: Error out if enable > dbits
X-Git-Tag: working-ls180~1195^2
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ab3917d0791874bab845ca74203c5aaa2ec842d2;p=yosys.git

Error out if enable > dbits
---

diff --git a/passes/memory/memory_bram.cc b/passes/memory/memory_bram.cc
index ddc56d9b5..aa8f94149 100644
--- a/passes/memory/memory_bram.cc
+++ b/passes/memory/memory_bram.cc
@@ -68,6 +68,10 @@ struct rules_t
 			if (groups != GetSize(transp)) log_error("Bram %s variant %d has %d groups but only %d entries in 'transp'.\n", log_id(name), variant, groups, GetSize(transp));
 			if (groups != GetSize(clocks)) log_error("Bram %s variant %d has %d groups but only %d entries in 'clocks'.\n", log_id(name), variant, groups, GetSize(clocks));
 			if (groups != GetSize(clkpol)) log_error("Bram %s variant %d has %d groups but only %d entries in 'clkpol'.\n", log_id(name), variant, groups, GetSize(clkpol));
+
+			int group = 0;
+			for (auto e : enable)
+				if (e > dbits) log_error("Bram %s variant %d group %d has %d enable bits but only %d dbits.\n", log_id(name), variant, group, e, dbits);
 		}
 
 		vector<portinfo_t> make_portinfos() const