From: Jacob Lifshay <programmerjake@gmail.com>
Date: Wed, 7 Oct 2020 04:01:15 +0000 (-0700)
Subject: fix div tests
X-Git-Tag: 24jan2021_ls180~197
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ab8dbb40b25c3c8eb67f62725088fbbbf33610b3;p=soc.git

fix div tests
---

diff --git a/src/soc/decoder/helpers.py b/src/soc/decoder/helpers.py
index a50d0092..41ab2c78 100644
--- a/src/soc/decoder/helpers.py
+++ b/src/soc/decoder/helpers.py
@@ -36,6 +36,13 @@ def EXTS64(value):
     return SelectableInt(exts(value.value, value.bits) & ((1 << 64)-1), 64)
 
 
+def EXTS128(value):
+    """ extends sign bit out from current MSB to 128 bits
+    """
+    assert isinstance(value, SelectableInt)
+    return SelectableInt(exts(value.value, value.bits) & ((1 << 128)-1), 128)
+
+
 # signed version of MUL
 def MULS(a, b):
     if isinstance(b, int):
diff --git a/src/soc/decoder/pseudo/pywriter.py b/src/soc/decoder/pseudo/pywriter.py
index 56a1a2e6..6cf005f0 100644
--- a/src/soc/decoder/pseudo/pywriter.py
+++ b/src/soc/decoder/pseudo/pywriter.py
@@ -22,7 +22,8 @@ header = """\
 from soc.decoder.isa.caller import inject, instruction_info
 from soc.decoder.helpers import (EXTS, EXTS64, EXTZ64, ROTL64, ROTL32, MASK,
                                  ne, eq, gt, ge, lt, le, ltu, gtu, length,
-                                 trunc_divs, trunc_rems, MULS, DIVS, MODS)
+                                 trunc_divs, trunc_rems, MULS, DIVS, MODS,
+                                 EXTS128)
 from soc.decoder.selectable_int import SelectableInt
 from soc.decoder.selectable_int import selectconcat as concat
 from soc.decoder.orderedset import OrderedSet
diff --git a/src/soc/fu/div/test/test_pipe_caller.py b/src/soc/fu/div/test/test_pipe_caller.py
index db572332..c636a068 100644
--- a/src/soc/fu/div/test/test_pipe_caller.py
+++ b/src/soc/fu/div/test/test_pipe_caller.py
@@ -11,6 +11,38 @@ from soc.fu.div.test.helper import (log_rand, get_cu_inputs,
 
 
 class DivTestCases(TestAccumulatorBase):
+    def case_divdeu_regression(self):
+        lst = ["divdeu 3, 1, 2"]
+        initial_regs = [0] * 32
+        initial_regs[1] = 0x1
+        initial_regs[2] = 0x2
+        with Program(lst, bigendian) as prog:
+            self.add_case(prog, initial_regs)
+
+    def case_divde_regression3(self):
+        lst = ["divde 3, 1, 2"]
+        initial_regs = [0] * 32
+        initial_regs[1] = 0x8000000000000000
+        initial_regs[2] = 0xFFFFFFFFFFFFFFFF
+        with Program(lst, bigendian) as prog:
+            self.add_case(prog, initial_regs)
+
+    def case_divwe_regression2(self):
+        lst = ["divwe 3, 1, 2"]
+        initial_regs = [0] * 32
+        initial_regs[1] = 0x80000000
+        initial_regs[2] = 0xFFFFFFFF
+        with Program(lst, bigendian) as prog:
+            self.add_case(prog, initial_regs)
+
+    def case_divde_regression2(self):
+        lst = ["divde 3, 1, 2"]
+        initial_regs = [0] * 32
+        initial_regs[1] = 0x1
+        initial_regs[2] = 0xfffffffffffffffe
+        with Program(lst, bigendian) as prog:
+            self.add_case(prog, initial_regs)
+
     def case_divde_regression(self):
         lst = ["divde 3, 1, 2"]
         initial_regs = [0] * 32