From: Luke Kenneth Casson Leighton Date: Wed, 5 Aug 2020 18:13:06 +0000 (+0100) Subject: clear sel on loadstore X-Git-Tag: semi_working_ecp5~437^2~1 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=abc33f9d61fec2222807284ea4173e6eeff7af5c;p=soc.git clear sel on loadstore --- diff --git a/src/soc/minerva/units/loadstore.py b/src/soc/minerva/units/loadstore.py index ffd6fec4..db05c300 100644 --- a/src/soc/minerva/units/loadstore.py +++ b/src/soc/minerva/units/loadstore.py @@ -85,6 +85,7 @@ class BareLoadStoreUnit(LoadStoreUnitInterface, Elaboratable): m.d.sync += [ self.dbus.cyc.eq(0), self.dbus.stb.eq(0), + self.dbus.sel.eq(0), self.m_ld_data_o.eq(self.dbus.dat_r) ] with m.Elif((self.x_ld_i | self.x_st_i) &