From: R Veera Kumar <vklr@vkten.in>
Date: Fri, 10 Jun 2022 12:33:23 +0000 (+0530)
Subject: Update working bugs
X-Git-Tag: opf_rfc_ls005_v1~1867
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ac15bdcda4ac1d85489ff8fb286064039cb3ba84;p=libreriscv.git

Update working bugs
---

diff --git a/veera.mdwn b/veera.mdwn
index f10e62e33..ac6a75075 100644
--- a/veera.mdwn
+++ b/veera.mdwn
@@ -8,6 +8,17 @@ Helping Core Hardware developers.
 
 ## Currently working on
 
+### NLNet.2019.10.Formal
+
+* [Bug #838](https://bugs.libre-soc.org/show_bug.cgi?id=838):
+  sync or at least statically check fields.text, power_decoder, trans\/svp64, CSVs between each other
+
+* [Bug #839](https://bugs.libre-soc.org/show_bug.cgi?id=839):
+  SVP64 \/ Extra-V \/ ZOLC whitepaper
+
+* [Bug #847](https://bugs.libre-soc.org/show_bug.cgi?id=847):
+  dev\-env\-setup script for binutils-gdb for target powerpc64le\-linux\-gnu
+
 ## Currently deffered
 
  - <https://bugs.libre-soc.org/show_bug.cgi?id=602> Low performance bare minimum functionality SIMD emulator required