From: lkcl Date: Sat, 31 Aug 2019 11:54:56 +0000 (+0100) Subject: (no commit message) X-Git-Tag: convert-csv-opcode-to-binary~4180 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ac2060fd6b2365faabb9ee3dd8f044e513af4f28;p=libreriscv.git --- diff --git a/simple_v_extension/vblock_format_table.mdwn b/simple_v_extension/vblock_format_table.mdwn index 6698059c8..151517502 100644 --- a/simple_v_extension/vblock_format_table.mdwn +++ b/simple_v_extension/vblock_format_table.mdwn @@ -24,16 +24,16 @@ The VL/MAXVL/SubVL Block format, when 16xil != 0b111, is: """]] When 16xil is 0b111, this is the "Extended" Format, using the >= 192-bit -RISC-V ISA format. Note that the length is 96+16\*nnnnnn, not 192+ +RISC-V ISA format. Note that the length is 96+16\*nnnnn, not 192+ | base+5 ... base+3 | base+1 | base | no. of bits | | ------ ----------------- | | ---------------- | ------------- | -| ..xxxx xxxxxxxxxxxxxxxx | | x111xxxxx1111111 | 96+16\*nnnnnn | +| ..xxxx xxxxxxxxxxxxxxxx | | x111xxxxx1111111 | 96+16\*nnnnn | | {ops}{Pred}{Reg}{VL Block}| VBLOCK2 | VBLOCK Prefix | | VBLOCK2 extends the VBLOCK fields: -| 15:13 | 12:11 | 10:9 | 8:6 | 5:0 | +| 15:12 | 11:10 | 9:8 | 7:5 | 4:0 | | ----- | ----- | ---- | --- | ---- | | rsvd | rplen2 | pplen2 | swlen | ilen | @@ -41,3 +41,4 @@ VBLOCK2 extends the VBLOCK fields: * swlen specifies the number of "swizzle" blocks * rplen2 extends rplen by 2 bits * pplen2 extends pplen by 2 bits +* 4 bits are reserved for additional tables (Matrices?)