From: Kristian Høgsberg Kristensen <kristian.h.kristensen@intel.com>
Date: Thu, 21 Jan 2016 22:14:01 +0000 (-0800)
Subject: vk: Do render cache flush for GEN8+
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ac60e98a582737897b6e1f858023eba0543d10f3;p=mesa.git

vk: Do render cache flush for GEN8+

This is needed for SKL as well.
---

diff --git a/src/vulkan/genX_cmd_buffer.c b/src/vulkan/genX_cmd_buffer.c
index 4f7054f83d2..1ab17470932 100644
--- a/src/vulkan/genX_cmd_buffer.c
+++ b/src/vulkan/genX_cmd_buffer.c
@@ -48,7 +48,7 @@ genX(cmd_buffer_emit_state_base_address)(struct anv_cmd_buffer *cmd_buffer)
       scratch_bo = &device->scratch_block_pool.bo;
 
 /* XXX: Do we need this on more than just BDW? */
-#if (ANV_GEN == 8)
+#if (ANV_GEN >= 8)
    /* Emit a render target cache flush.
     *
     * This isn't documented anywhere in the PRM.  However, it seems to be
@@ -56,7 +56,7 @@ genX(cmd_buffer_emit_state_base_address)(struct anv_cmd_buffer *cmd_buffer)
     * this, we get GPU hangs when using multi-level command buffers which
     * clear depth, reset state base address, and then go render stuff.
     */
-   anv_batch_emit(&cmd_buffer->batch, GEN8_PIPE_CONTROL,
+   anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL),
                   .RenderTargetCacheFlushEnable = true);
 #endif