From: lkcl <lkcl@web>
Date: Thu, 13 Apr 2023 21:46:51 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls008_v1~26
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ac63df61925366398aa92bd50eb51185ab9f1f52;p=libreriscv.git

---

diff --git a/openpower/sv/rfc/ls011.mdwn b/openpower/sv/rfc/ls011.mdwn
index 0b3734675..307db5a27 100644
--- a/openpower/sv/rfc/ls011.mdwn
+++ b/openpower/sv/rfc/ls011.mdwn
@@ -11,6 +11,9 @@ instructions are already present in x86 (sort-of).
 
 * x86 chose that store should be pre-indexed and load should be post-indexed
 * Power ISA chose everything to be pre-indexed
+* Motorola 68000 (decades old) has pre- and post- indexed
+
+<https://tack.sourceforge.net/olddocs/m68020.html#2.2.2.%20Extra%20MC68020%20addressing%20modes>
 
 <https://azeria-labs.com/memory-instructions-load-and-store-part-4/>