From: Stan Cox Date: Fri, 4 Oct 1996 14:07:02 +0000 (+0000) Subject: (adddi3_1, subdi3_1): insns renamed from adddi3 and subdi3; X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=acb94fa1e947d9c7791158f44631bde32492de64;p=gcc.git (adddi3_1, subdi3_1): insns renamed from adddi3 and subdi3; added missing earlyclobbers. (adddi3_1): removed duplicates from commutativity. (adddi3, subdi3): new define_expands. From-SVN: r12898 --- diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 81140bb9a82..341f10022d5 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -1128,7 +1128,9 @@ if (TARGET_MOVE && (reload_in_progress | reload_completed) == 0 && GET_CODE (operands[0]) == MEM - && (GET_CODE (operands[1]) == MEM || push_operand (operands[0], SFmode))) + && (GET_CODE (operands[1]) == MEM || push_operand (operands[0], SFmode)) + && (N_REGS_USED (operands[0]) + N_REGS_USED (operands[1]) + < N_ALLOCATABLE_REGISTERS)) { rtx (*genfunc) PROTO((rtx, rtx)) = (push_operand (operands[0], SFmode)) ? gen_movsf_push @@ -1234,7 +1236,8 @@ [(set (match_operand:SF 0 "memory_operand" "=m") (match_operand:SF 1 "memory_operand" "m")) (clobber (match_scratch:SI 2 "=&r"))] - "" + "N_REGS_USED (operands[0]) + N_REGS_USED (operands[1]) + < N_ALLOCATABLE_REGISTERS" "* { output_asm_insn (AS2 (mov%L2,%1,%2), operands); @@ -1245,7 +1248,10 @@ (define_insn "movsf_normal" [(set (match_operand:SF 0 "nonimmediate_operand" "=*rfm,*rf,f,!*rm") (match_operand:SF 1 "general_operand" "*rf,*rfm,fG,fF"))] - "(!TARGET_MOVE || GET_CODE (operands[0]) != MEM) || (GET_CODE (operands[1]) != MEM)" + "! TARGET_MOVE || GET_CODE (operands[0]) != MEM + || GET_CODE (operands[1]) != MEM + || (N_REGS_USED (operands[0]) + N_REGS_USED (operands[1]) + == N_ALLOCATABLE_REGISTERS)" "* { int stack_top_dies = find_regno_note (insn, REG_DEAD, FIRST_STACK_REG) != 0; @@ -1323,7 +1329,9 @@ if (TARGET_MOVE && (reload_in_progress | reload_completed) == 0 && GET_CODE (operands[0]) == MEM - && (GET_CODE (operands[1]) == MEM || push_operand (operands[0], DFmode))) + && (GET_CODE (operands[1]) == MEM || push_operand (operands[0], DFmode)) + && (N_REGS_USED (operands[0]) + N_REGS_USED (operands[1]) + < N_ALLOCATABLE_REGISTERS)) { rtx (*genfunc) PROTO((rtx, rtx)) = (push_operand (operands[0], DFmode)) ? gen_movdf_push @@ -1423,15 +1431,18 @@ (match_operand:DF 1 "memory_operand" "o,o")) (clobber (match_scratch:SI 2 "=&r,&r")) (clobber (match_scratch:SI 3 "=&r,X"))] - "" + "N_REGS_USED (operands[0]) + N_REGS_USED (operands[1]) + < N_ALLOCATABLE_REGISTERS" "* return output_move_memory (operands, insn, GET_MODE_SIZE (DFmode), 2, 4);") ;; For the purposes of regclass, prefer FLOAT_REGS. (define_insn "" [(set (match_operand:DF 0 "nonimmediate_operand" "=f,fm,!*rf,!*rm") (match_operand:DF 1 "general_operand" "fmG,f,*rfm,*rfF"))] - "(!TARGET_MOVE || GET_CODE (operands[0]) != MEM) - || (GET_CODE (operands[1]) != MEM)" + "! TARGET_MOVE || GET_CODE (operands[0]) != MEM + || GET_CODE (operands[1]) != MEM + || (N_REGS_USED (operands[0]) + N_REGS_USED (operands[1]) + == N_ALLOCATABLE_REGISTERS)" "* { int stack_top_dies = find_regno_note (insn, REG_DEAD, FIRST_STACK_REG) != 0; @@ -1510,7 +1521,9 @@ if (TARGET_MOVE && (reload_in_progress | reload_completed) == 0 && GET_CODE (operands[0]) == MEM - && (GET_CODE (operands[1]) == MEM || push_operand (operands[0], XFmode))) + && (GET_CODE (operands[1]) == MEM || push_operand (operands[0], XFmode)) + && (N_REGS_USED (operands[0]) + N_REGS_USED (operands[1]) + < N_ALLOCATABLE_REGISTERS)) { rtx (*genfunc) PROTO((rtx, rtx)) = (push_operand (operands[0], XFmode)) ? gen_movxf_push @@ -1608,14 +1621,17 @@ (match_operand:XF 1 "memory_operand" "o,o")) (clobber (match_scratch:SI 2 "=&r,&r")) (clobber (match_scratch:SI 3 "=&r,X"))] - "" + "N_REGS_USED (operands[0]) + N_REGS_USED (operands[1]) + < N_ALLOCATABLE_REGISTERS" "* return output_move_memory (operands, insn, GET_MODE_SIZE (XFmode), 2, 4);") (define_insn "" [(set (match_operand:XF 0 "nonimmediate_operand" "=f,fm,!*rf,!*rm") (match_operand:XF 1 "general_operand" "fmG,f,*rfm,*rfF"))] - "(!TARGET_MOVE || GET_CODE (operands[0]) != MEM) - || (GET_CODE (operands[1]) != MEM)" + "! TARGET_MOVE || GET_CODE (operands[0]) != MEM + || GET_CODE (operands[1]) != MEM + || (N_REGS_USED (operands[0]) + N_REGS_USED (operands[1]) + == N_ALLOCATABLE_REGISTERS)" "* { int stack_top_dies = find_regno_note (insn, REG_DEAD, FIRST_STACK_REG) != 0; @@ -2703,12 +2719,16 @@ ;;- add instructions -(define_insn "addsidi3_1" +(define_insn "*addsidi3_1" [(set (match_operand:DI 0 "nonimmediate_operand" "=&r,r,o,&r,r,o,o") (plus:DI (match_operand:DI 1 "general_operand" "0,0,0,o,riF,riF,o") (zero_extend:DI (match_operand:SI 2 "general_operand" "o,ri,ri,roi,roi,ri,ri")))) (clobber (match_scratch:SI 3 "=X,X,X,X,X,X,&r"))] - "" + "((rtx_equal_p (operands[0], operands[1]) ? 0 + : (N_REGS_USED (operands[0]) + + (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM))) + + N_REGS_USED (operands[1]) + N_REGS_USED (operands[2])) + <= N_ALLOCATABLE_REGISTERS" "* { rtx low[3], high[3], xops[7], temp; @@ -2751,12 +2771,16 @@ RET; }") -(define_insn "addsidi3_2" +(define_insn "*addsidi3_2" [(set (match_operand:DI 0 "nonimmediate_operand" "=&r,r,o,&r,r,o,o") (plus:DI (zero_extend:DI (match_operand:SI 2 "general_operand" "o,ri,ri,o,ri,ri,ri")) (match_operand:DI 1 "general_operand" "0,0,0,roiF,roiF,riF,o"))) (clobber (match_scratch:SI 3 "=X,X,X,X,X,X,&r"))] - "" + "((rtx_equal_p (operands[0], operands[2]) ? 0 + : (N_REGS_USED (operands[0]) + + (GET_CODE (operands[0]) == MEM && GET_CODE (operands[2]) == MEM))) + + N_REGS_USED (operands[1]) + N_REGS_USED (operands[2])) + <= N_ALLOCATABLE_REGISTERS" "* { rtx low[3], high[3], xops[7], temp; @@ -2829,12 +2853,49 @@ RET; }") -(define_insn "adddi3" - [(set (match_operand:DI 0 "general_operand" "=&r,ro,o,&r,ro,o,&r,o,o,o") - (plus:DI (match_operand:DI 1 "general_operand" "%0,0,0,o,riF,o,or,riF,riF,o") - (match_operand:DI 2 "general_operand" "o,riF,o,0,0,0,oriF,riF,o,o"))) - (clobber (match_scratch:SI 3 "=X,X,&r,X,&r,&r,X,&r,&r,&r"))] +(define_expand "adddi3" + [(parallel [(set (match_operand:DI 0 "nonimmediate_operand" "") + (plus:DI (match_operand:DI 1 "general_operand" "") + (match_operand:DI 2 "general_operand" ""))) + (clobber (match_scratch:SI 3 ""))])] "" + " +{ + if ((((rtx_equal_p (operands[0], operands[1]) + || rtx_equal_p (operands[0], operands[2])) + ? (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM + && GET_CODE (operands[2]) == MEM) + : N_REGS_USED (operands[0]) + (GET_CODE (operands[0]) == MEM)) + + N_REGS_USED (operands[1]) + N_REGS_USED (operands[2])) + > N_ALLOCATABLE_REGISTERS) + { + if (GET_CODE (operands[0]) == REG) + { + gen_movdi (operands[0], operands[1]); + operands[1] = operands[0]; + } + else + { + rtx tmp = force_reg (DImode, operands[0]); + emit_insn (gen_adddi3 (tmp, operands[1], operands[2])); + emit_insn (gen_movdi (operands[0], tmp)); + DONE; + } + } +}") + +(define_insn "*adddi3_1" + [(set (match_operand:DI 0 "nonimmediate_operand" "=&r,&ro,o,&r,o,o,o") + (plus:DI (match_operand:DI 1 "general_operand" "%0,0,0,or,riF,riF,o") + (match_operand:DI 2 "general_operand" "o,riF,o,oriF,riF,o,o"))) + (clobber (match_scratch:SI 3 "=X,X,&r,X,&r,&r,&r"))] + "(((rtx_equal_p (operands[0], operands[1]) + || rtx_equal_p (operands[0], operands[2])) + ? (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM + && GET_CODE (operands[2]) == MEM) + : N_REGS_USED (operands[0]) + (GET_CODE (operands[0]) == MEM)) + + N_REGS_USED (operands[1]) + N_REGS_USED (operands[2])) + <= N_ALLOCATABLE_REGISTERS" "* { rtx low[3], high[3], xops[7], temp; @@ -3105,12 +3166,16 @@ ;;- subtract instructions -(define_insn "subsidi3" +(define_insn "*subsidi3" [(set (match_operand:DI 0 "general_operand" "=&r,ro,&r,o,o") (minus:DI (match_operand:DI 1 "general_operand" "0,0,roiF,riF,o") (zero_extend:DI (match_operand:SI 2 "general_operand" "o,ri,roi,ri,ri")))) (clobber (match_scratch:SI 3 "=X,X,X,X,&r"))] - "" + "((rtx_equal_p (operands[0], operands[1]) ? 0 + : (N_REGS_USED (operands[0]) + + (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM))) + + N_REGS_USED (operands[1]) + N_REGS_USED (operands[2])) + <= N_ALLOCATABLE_REGISTERS" "* { rtx low[3], high[3], xops[7]; @@ -3153,12 +3218,43 @@ RET; }") -(define_insn "subdi3" - [(set (match_operand:DI 0 "general_operand" "=&r,ro,&r,o,o") +(define_expand "subdi3" + [(parallel [(set (match_operand:DI 0 "nonimmediate_operand" "") + (minus:DI (match_operand:DI 1 "general_operand" "") + (match_operand:DI 2 "general_operand" ""))) + (clobber (match_scratch:SI 3 ""))])] + "" + " +{ + if (((rtx_equal_p (operands[0], operands[1]) ? 0 + : N_REGS_USED (operands[0]) + (GET_CODE (operands[0]) == MEM)) + + N_REGS_USED (operands[1]) + N_REGS_USED (operands[2])) + > N_ALLOCATABLE_REGISTERS) + { + if (GET_CODE (operands[0]) == REG) + { + gen_movdi (operands[0], operands[1]); + operands[1] = operands[0]; + } + else + { + rtx tmp = force_reg (DImode, operands[0]); + emit_insn (gen_subdi3 (tmp, operands[1], operands[2])); + emit_insn (gen_movdi (operands[0], tmp)); + DONE; + } + } +}") + +(define_insn "*subdi3_1" + [(set (match_operand:DI 0 "nonimmediate_operand" "=&r,&ro,&r,o,o") (minus:DI (match_operand:DI 1 "general_operand" "0,0,roiF,riF,o") (match_operand:DI 2 "general_operand" "o,riF,roiF,riF,o"))) (clobber (match_scratch:SI 3 "=X,X,X,&r,&r"))] - "" + "((rtx_equal_p (operands[0], operands[1]) ? 0 + : N_REGS_USED (operands[0]) + (GET_CODE (operands[0]) == MEM)) + + N_REGS_USED (operands[1]) + N_REGS_USED (operands[2])) + <= N_ALLOCATABLE_REGISTERS" "* { rtx low[3], high[3], xops[7];