From: Marek Olšák <marek.olsak@amd.com>
Date: Fri, 20 Mar 2020 21:30:33 +0000 (-0400)
Subject: radeonsi/gfx10: fix ds.ordered.add intrinsic for compute-based culling
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=acc5bdf8870e0c47c00028f9f5502de036e79d3d;p=mesa.git

radeonsi/gfx10: fix ds.ordered.add intrinsic for compute-based culling

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4269>
---

diff --git a/src/gallium/drivers/radeonsi/si_compute_prim_discard.c b/src/gallium/drivers/radeonsi/si_compute_prim_discard.c
index ec95ec1214f..7bd14446580 100644
--- a/src/gallium/drivers/radeonsi/si_compute_prim_discard.c
+++ b/src/gallium/drivers/radeonsi/si_compute_prim_discard.c
@@ -240,6 +240,9 @@ si_build_ds_ordered_op(struct si_shader_context *ctx, const char *opcode,
 		       LLVMValueRef m0, LLVMValueRef value, unsigned ordered_count_index,
 		       bool release, bool done)
 {
+	if (ctx->screen->info.chip_class >= GFX10)
+		ordered_count_index |= 1 << 24; /* number of dwords == 1 */
+
 	LLVMValueRef args[] = {
 		LLVMBuildIntToPtr(ctx->ac.builder, m0,
 				  LLVMPointerType(ctx->ac.i32, AC_ADDR_SPACE_GDS), ""),