From: Shriya Sharma <shriya@redsemiconductor.com>
Date: Tue, 26 Sep 2023 10:22:11 +0000 (+0100)
Subject: Added english language description, spaces and brackets for lhzx instruction
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ad4a21ecaf1d50e133ad21925431b72298f0ef32;p=openpower-isa.git

Added english language description, spaces and brackets for lhzx instruction
---

diff --git a/openpower/isa/fixedload.mdwn b/openpower/isa/fixedload.mdwn
index 8ab40cb3..d1b69765 100644
--- a/openpower/isa/fixedload.mdwn
+++ b/openpower/isa/fixedload.mdwn
@@ -156,6 +156,12 @@ Pseudo-code:
     EA <- b + (RB)
     RT <- ([0] * (XLEN-16)) || MEM(EA, 2)
 
+Description:
+
+    Let the effective address (EA) be the sum
+    (RA|0)+ (RB). The halfword in storage addressed by
+    EA is loaded into RT 48:63. RT 0:47 are set to 0.
+
 Special Registers Altered:
 
     None