From: Jiong Wang Date: Thu, 12 May 2016 17:00:52 +0000 (+0000) Subject: [LRA] PR70904, relax the restriction on subreg reload for wide mode X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ada2eb687fd49e37664b92a59dbed55f19e62eb8;p=gcc.git [LRA] PR70904, relax the restriction on subreg reload for wide mode 2016-05-12 Jiong Wang gcc/ PR rtl-optimization/70904 * lra-constraint.c (process_addr_reg): Relax the restriction on subreg reload for wide mode. From-SVN: r236181 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index de20f4ba3ff..b9a18e8dd60 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2016-05-12 Jiong Wang + + PR rtl-optimization/70904 + * lra-constraint.c (process_addr_reg): Relax the restriction on subreg + reload for wide mode. + 2016-05-12 Marek Polacek PR c/70756 diff --git a/gcc/lra-constraints.c b/gcc/lra-constraints.c index 14d5f1dc538..56ab5b45c17 100644 --- a/gcc/lra-constraints.c +++ b/gcc/lra-constraints.c @@ -1307,7 +1307,21 @@ process_addr_reg (rtx *loc, bool check_only_p, rtx_insn **before, rtx_insn **aft subreg_p = GET_CODE (*loc) == SUBREG; if (subreg_p) - loc = &SUBREG_REG (*loc); + { + reg = SUBREG_REG (*loc); + mode = GET_MODE (reg); + + /* For mode with size bigger than ptr_mode, there unlikely to be "mov" + between two registers with different classes, but there normally will + be "mov" which transfers element of vector register into the general + register, and this normally will be a subreg which should be reloaded + as a whole. This is particularly likely to be triggered when + -fno-split-wide-types specified. */ + if (in_class_p (reg, cl, &new_class) + || GET_MODE_SIZE (mode) <= GET_MODE_SIZE (ptr_mode)) + loc = &SUBREG_REG (*loc); + } + reg = *loc; mode = GET_MODE (reg); if (! REG_P (reg))