From: Andrew Zonenberg <azonenberg@drawersteak.com>
Date: Wed, 21 Dec 2016 03:35:29 +0000 (+0800)
Subject: greenpak4: Added INT pin to GP_SPI
X-Git-Tag: yosys-0.8~553^2^2~1
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ada98844b93e29fcbcfada02f89b2882d73182f1;p=yosys.git

greenpak4: Added INT pin to GP_SPI
---

diff --git a/techlibs/greenpak4/cells_sim.v b/techlibs/greenpak4/cells_sim.v
index a75ea3fe6..dd21bdd50 100644
--- a/techlibs/greenpak4/cells_sim.v
+++ b/techlibs/greenpak4/cells_sim.v
@@ -596,10 +596,12 @@ module GP_SPI(
 	input[7:0] TXD_HIGH,
 	input[7:0] TXD_LOW,
 	output reg[7:0] RXD_HIGH,
-	output reg[7:0] RXD_LOW);
+	output reg[7:0] RXD_LOW,
+	output reg INT);
 
 	initial DOUT_HIGH = 0;
 	initial DOUT_LOW = 0;
+	initial INT = 0;
 
 	parameter DATA_WIDTH = 8;		//byte or word width
 	parameter SPI_CPHA = 0;			//SPI clock phase