From: H.J. Lu <hongjiu.lu@intel.com>
Date: Tue, 4 May 2010 18:51:29 +0000 (+0000)
Subject: Add clobber CC register to sse_prologue_save patterns.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ade6a9acdb65ffbf3e946bd2aef6da1b86616b0c;p=gcc.git

Add clobber CC register to sse_prologue_save patterns.

gcc/

2010-05-04  H.J. Lu  <hongjiu.lu@intel.com>

	PR target/43799
	* config/i386/i386.md (sse_prologue_save): Add clobber CC
	register.
	(*sse_prologue_save_insn1): Likewise.
	(SSE prologue save splitter): Likewise.

gcc/testsuite/

2010-05-04  H.J. Lu  <hongjiu.lu@intel.com>

	PR target/43799
	* gcc.target/i386/pr43799.c: New.

From-SVN: r159040
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 72671c84f7a..61797432b8d 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2010-05-04  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR target/43799
+	* config/i386/i386.md (sse_prologue_save): Add clobber CC
+	register.
+	(*sse_prologue_save_insn1): Likewise.
+	(SSE prologue save splitter): Likewise.
+
 2010-05-04  Eric Botcazou  <ebotcazou@adacore.com>
 
 	* tree.c (free_lang_data_in_one_sizepos): New inline function.
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 8249efd31fd..86351e17008 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -18326,6 +18326,7 @@
 				(reg:DI XMM5_REG)
 				(reg:DI XMM6_REG)
 				(reg:DI XMM7_REG)] UNSPEC_SSE_PROLOGUE_SAVE))
+	      (clobber (reg:CC FLAGS_REG))
 	      (clobber (match_operand:DI 1 "register_operand" ""))
 	      (use (match_operand:DI 2 "immediate_operand" ""))
 	      (use (label_ref:DI (match_operand 3 "" "")))
@@ -18352,6 +18353,7 @@
 		     (reg:DI XMM5_REG)
 		     (reg:DI XMM6_REG)
 		     (reg:DI XMM7_REG)] UNSPEC_SSE_PROLOGUE_SAVE))
+   (clobber (reg:CC FLAGS_REG))
    (clobber (match_operand:DI 1 "register_operand" "=r"))
    (use (match_operand:DI 2 "const_int_operand" "i"))
    (use (label_ref:DI (match_operand 3 "" "X")))
@@ -18377,6 +18379,7 @@
 				 (reg:DI XMM5_REG)
 				 (reg:DI XMM6_REG)
 				 (reg:DI XMM7_REG)] UNSPEC_SSE_PROLOGUE_SAVE))
+	       (clobber (reg:CC FLAGS_REG))
 	       (clobber (match_operand:DI 1 "register_operand" ""))
 	       (use (match_operand:DI 2 "const_int_operand" ""))
 	       (use (match_operand 3 "" ""))
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 1ad5bc027b3..737a9f151e2 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2010-05-04  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR target/43799
+	* gcc.target/i386/pr43799.c: New.
+
 2010-05-04  Eric Botcazou  <ebotcazou@adacore.com>
 
 	* gnat.dg/lto1.adb: New test.
diff --git a/gcc/testsuite/gcc.target/i386/pr43799.c b/gcc/testsuite/gcc.target/i386/pr43799.c
new file mode 100644
index 00000000000..de9022d0cb6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr43799.c
@@ -0,0 +1,19 @@
+/* { dg-do run } */
+/* { dg-options "-O -fschedule-insns" } */
+
+int f4 (int i, ...)
+{
+  int y = 0;
+   __builtin_va_list ap;
+   __builtin_va_start(ap, i);
+   if (i == 5) y = __builtin_va_arg(ap, double);
+   __builtin_va_end(ap);
+   return y;
+}
+
+int main (void)
+{
+  if (f4 (5, 7.0) != 7)
+    __builtin_abort ();
+  return 0;
+}