From: Srikant Bharadwaj Date: Tue, 26 Feb 2019 19:44:40 +0000 (-0500) Subject: cpu: Fix indirect branch history updates X-Git-Tag: v19.0.0.0~1086 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ae233c7723caf0c441e251883d887c98134e0482;p=gem5.git cpu: Fix indirect branch history updates Recent changes to indirect branch predictor interface accesses non-existent buffers even when indirect predictor is not in use. Change-Id: I0df9ac4d5f6f3cb63e4d1bd36949c27f7611eef6 Reviewed-on: https://gem5-review.googlesource.com/c/16668 Reviewed-by: Anthony Gutierrez Maintainer: Anthony Gutierrez --- diff --git a/src/cpu/pred/bpred_unit.cc b/src/cpu/pred/bpred_unit.cc index a768cc19e..2bfd90140 100644 --- a/src/cpu/pred/bpred_unit.cc +++ b/src/cpu/pred/bpred_unit.cc @@ -371,7 +371,9 @@ BPredUnit::squash(const InstSeqNum &squashed_sn, ThreadID tid) // This call should delete the bpHistory. squash(tid, pred_hist.front().bpHistory); - iPred.deleteDirectionInfo(tid, pred_hist.front().indirectHistory); + if (useIndirect) { + iPred.deleteDirectionInfo(tid, pred_hist.front().indirectHistory); + } DPRINTF(Branch, "[tid:%i]: Removing history for [sn:%i] " "PC %s.\n", tid, pred_hist.front().seqNum, @@ -452,8 +454,10 @@ BPredUnit::squash(const InstSeqNum &squashed_sn, pred_hist.front().bpHistory, true, pred_hist.front().inst, corrTarget.instAddr()); - iPred.changeDirectionPrediction(tid, pred_hist.front().indirectHistory, - actually_taken); + if (useIndirect) { + iPred.changeDirectionPrediction(tid, + pred_hist.front().indirectHistory, actually_taken); + } if (actually_taken) { if (hist_it->wasReturn && !hist_it->usedRAS) {